forked from len0rd/rockbox
S5L8700/Meizu: miscellaneous minor fixes, stubs added, keywords set
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21820 a1c6a512-1295-4272-9138-f99709370657
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c133c6a964
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92fed35da6
7 changed files with 57 additions and 27 deletions
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@ -410,7 +410,7 @@
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#define MCAR1 (*(REG32_PTR_T)(0x38800094)) /* Memory Current Address Register1 */
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#define MCAR2 (*(REG32_PTR_T)(0x38800098)) /* Memory Current Address Register2 */
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/* 22. USB 1.1 HOST CONTROLER SPECIAL REGISTER */
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/* 22. USB 1.1 HOST CONTROLLER SPECIAL REGISTER */
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#define HcRevision (*(REG32_PTR_T)(0x38600000))
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#define HcControl (*(REG32_PTR_T)(0x38600004))
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#define HcCommandStatus (*(REG32_PTR_T)(0x38600008))
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@ -440,25 +440,25 @@
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#define URSTCON (*(REG32_PTR_T)(0x3C400008)) /* USB Reset Control Register */
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#define UCLKCON (*(REG32_PTR_T)(0x3C400010)) /* USB Clock Control Register */
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/* 24. GPIO PORT CONTROLL */
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/* 24. GPIO PORT CONTROL */
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#define PCON0 (*(REG32_PTR_T)(0x3CF00000)) /* Configures the pins of port 0 */
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#define PDAT0 (*(REG32_PTR_T)(0x3CF00004)) /* The data register for port 0 */
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#define PCON1 (*(REG32_PTR_T)(0x3CF00010)) /* Configures the pins of port 0 */
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#define PDAT1 (*(REG32_PTR_T)(0x3CF00014)) /* The data register for port 0 */
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#define PCON2 (*(REG32_PTR_T)(0x3CF00020)) /* Configures the pins of port 0 */
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#define PDAT2 (*(REG32_PTR_T)(0x3CF00024)) /* The data register for port 0 */
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#define PCON3 (*(REG32_PTR_T)(0x3CF00030)) /* Configures the pins of port 0 */
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#define PDAT3 (*(REG32_PTR_T)(0x3CF00034)) /* The data register for port 0 */
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#define PCON4 (*(REG32_PTR_T)(0x3CF00040)) /* Configures the pins of port 0 */
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#define PDAT4 (*(REG32_PTR_T)(0x3CF00044)) /* The data register for port 0 */
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#define PCON5 (*(REG32_PTR_T)(0x3CF00050)) /* Configures the pins of port 0 */
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#define PDAT5 (*(REG32_PTR_T)(0x3CF00054)) /* The data register for port 0 */
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#define PCON6 (*(REG32_PTR_T)(0x3CF00060)) /* Configures the pins of port 0 */
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#define PDAT6 (*(REG32_PTR_T)(0x3CF00064)) /* The data register for port 0 */
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#define PCON7 (*(REG32_PTR_T)(0x3CF00070)) /* Configures the pins of port 0 */
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#define PDAT7 (*(REG32_PTR_T)(0x3CF00074)) /* The data register for port 0 */
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#define PCON10 (*(REG32_PTR_T)(0x3CF000A0)) /* Configures the pins of port 0 */
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#define PDAT10 (*(REG32_PTR_T)(0x3CF000A4)) /* The data register for port 0 */
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#define PCON1 (*(REG32_PTR_T)(0x3CF00010)) /* Configures the pins of port 1 */
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#define PDAT1 (*(REG32_PTR_T)(0x3CF00014)) /* The data register for port 1 */
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#define PCON2 (*(REG32_PTR_T)(0x3CF00020)) /* Configures the pins of port 2 */
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#define PDAT2 (*(REG32_PTR_T)(0x3CF00024)) /* The data register for port 2 */
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#define PCON3 (*(REG32_PTR_T)(0x3CF00030)) /* Configures the pins of port 3 */
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#define PDAT3 (*(REG32_PTR_T)(0x3CF00034)) /* The data register for port 3 */
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#define PCON4 (*(REG32_PTR_T)(0x3CF00040)) /* Configures the pins of port 4 */
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#define PDAT4 (*(REG32_PTR_T)(0x3CF00044)) /* The data register for port 4 */
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#define PCON5 (*(REG32_PTR_T)(0x3CF00050)) /* Configures the pins of port 5 */
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#define PDAT5 (*(REG32_PTR_T)(0x3CF00054)) /* The data register for port 5 */
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#define PCON6 (*(REG32_PTR_T)(0x3CF00060)) /* Configures the pins of port 6 */
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#define PDAT6 (*(REG32_PTR_T)(0x3CF00064)) /* The data register for port 6 */
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#define PCON7 (*(REG32_PTR_T)(0x3CF00070)) /* Configures the pins of port 7 */
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#define PDAT7 (*(REG32_PTR_T)(0x3CF00074)) /* The data register for port 7 */
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#define PCON10 (*(REG32_PTR_T)(0x3CF000A0)) /* Configures the pins of port 10 */
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#define PDAT10 (*(REG32_PTR_T)(0x3CF000A4)) /* The data register for port 10 */
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#define PCON_ASRAM (*(REG32_PTR_T)(0x3CF000F0)) /* Configures the pins of port nor flash */
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#define PCON_SDRAM (*(REG32_PTR_T)(0x3CF000F4)) /* Configures the pins of port sdram */
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#define PCON11 (*(REG32_PTR_T)(0x3CF000F8)) /* Configures the pins of port 11 */
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@ -49,12 +49,19 @@ void nand_led(bool onoff)
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int nand_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
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void* inbuf)
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{
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(void)start;
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(void)incount;
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(void)inbuf;
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return 0;
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}
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int nand_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
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const void* outbuf)
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{
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(void)start;
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(void)count;
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(void)outbuf;
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return 0;
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}
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void nand_spindown(int seconds)
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@ -82,8 +89,22 @@ int nand_soft_reset(void)
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void nand_enable(bool on)
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{
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(void)on;
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}
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void nand_get_info(IF_MV2(int drive,) struct storage_info *info)
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{
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(void)info;
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}
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long nand_last_disk_activity(void)
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{
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return 0;
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}
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int nand_init(void)
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{
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initialized = true;
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return 0;
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}
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Bertrik Sikken
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* Copyright (C) 2009 by Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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@ -33,8 +33,9 @@
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* data, pointer to data to be transfered
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A return value < 0 indicates an error.
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Known issues:
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* uses polled mode (not interrupt driven), just like the OF
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Note:
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* blocks the calling thread for the entire duraton of the i2c transfer but
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uses wakeup_wait/wakeup_signal to allow other threads to run.
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* ACK from slave is not checked, so functions never return an error
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*/
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@ -44,7 +44,7 @@ void tick_start(unsigned int interval_in_ms)
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/* configure timer for 10 kHz */
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TBCMD = (1 << 1); /* TB_CLR */
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TBPRE = 625; /* prescaler */
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TBPRE = 624; /* prescaler */
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TBCON = (0 << 13) | /* TB_INT1_EN */
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(1 << 12) | /* TB_INT0_EN */
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(0 << 11) | /* TB_START */
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@ -72,7 +72,7 @@ static void lcd_sleep(uint32_t t)
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for(i=0;i<t;++i);
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}
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static uint8_t lcd_readdata()
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static uint8_t lcd_readdata(void)
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{
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LCD_RDATA = 0;
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lcd_sleep(64);
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@ -87,7 +87,7 @@ static void lcd_writereg(uint32_t reg, uint32_t data)
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LCD_WDATA = data & 0xff;
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}
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void lcd_on() {
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void lcd_on(void) {
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if (lcd_type == 1) {
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LCD_WCMD = 0x29;
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} else {
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@ -101,7 +101,7 @@ void lcd_on() {
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}
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}
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void lcd_off() {
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void lcd_off(void) {
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/* FIXME wait for DMA to finnish */
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if (lcd_type == 1) {
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LCD_WCMD = 0x28;
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@ -303,3 +303,11 @@ void lcd_update_rect(int x, int y, int width, int height)
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{
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lcd_update();
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}
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void lcd_blit_yuv(unsigned char * const src[3],
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int src_x, int src_y, int stride,
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int x, int y, int width, int height)
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{
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/* stub */
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}
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 Rafaël Carré
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* Copyright (C) 2009 Bertrik Sikken
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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