diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index 7583d291f6..e0b56c7534 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h @@ -410,7 +410,7 @@ #define MCAR1 (*(REG32_PTR_T)(0x38800094)) /* Memory Current Address Register1 */ #define MCAR2 (*(REG32_PTR_T)(0x38800098)) /* Memory Current Address Register2 */ -/* 22. USB 1.1 HOST CONTROLER SPECIAL REGISTER */ +/* 22. USB 1.1 HOST CONTROLLER SPECIAL REGISTER */ #define HcRevision (*(REG32_PTR_T)(0x38600000)) #define HcControl (*(REG32_PTR_T)(0x38600004)) #define HcCommandStatus (*(REG32_PTR_T)(0x38600008)) @@ -440,25 +440,25 @@ #define URSTCON (*(REG32_PTR_T)(0x3C400008)) /* USB Reset Control Register */ #define UCLKCON (*(REG32_PTR_T)(0x3C400010)) /* USB Clock Control Register */ -/* 24. GPIO PORT CONTROLL */ +/* 24. GPIO PORT CONTROL */ #define PCON0 (*(REG32_PTR_T)(0x3CF00000)) /* Configures the pins of port 0 */ #define PDAT0 (*(REG32_PTR_T)(0x3CF00004)) /* The data register for port 0 */ -#define PCON1 (*(REG32_PTR_T)(0x3CF00010)) /* Configures the pins of port 0 */ -#define PDAT1 (*(REG32_PTR_T)(0x3CF00014)) /* The data register for port 0 */ -#define PCON2 (*(REG32_PTR_T)(0x3CF00020)) /* Configures the pins of port 0 */ -#define PDAT2 (*(REG32_PTR_T)(0x3CF00024)) /* The data register for port 0 */ -#define PCON3 (*(REG32_PTR_T)(0x3CF00030)) /* Configures the pins of port 0 */ -#define PDAT3 (*(REG32_PTR_T)(0x3CF00034)) /* The data register for port 0 */ -#define PCON4 (*(REG32_PTR_T)(0x3CF00040)) /* Configures the pins of port 0 */ -#define PDAT4 (*(REG32_PTR_T)(0x3CF00044)) /* The data register for port 0 */ -#define PCON5 (*(REG32_PTR_T)(0x3CF00050)) /* Configures the pins of port 0 */ -#define PDAT5 (*(REG32_PTR_T)(0x3CF00054)) /* The data register for port 0 */ -#define PCON6 (*(REG32_PTR_T)(0x3CF00060)) /* Configures the pins of port 0 */ -#define PDAT6 (*(REG32_PTR_T)(0x3CF00064)) /* The data register for port 0 */ -#define PCON7 (*(REG32_PTR_T)(0x3CF00070)) /* Configures the pins of port 0 */ -#define PDAT7 (*(REG32_PTR_T)(0x3CF00074)) /* The data register for port 0 */ -#define PCON10 (*(REG32_PTR_T)(0x3CF000A0)) /* Configures the pins of port 0 */ -#define PDAT10 (*(REG32_PTR_T)(0x3CF000A4)) /* The data register for port 0 */ +#define PCON1 (*(REG32_PTR_T)(0x3CF00010)) /* Configures the pins of port 1 */ +#define PDAT1 (*(REG32_PTR_T)(0x3CF00014)) /* The data register for port 1 */ +#define PCON2 (*(REG32_PTR_T)(0x3CF00020)) /* Configures the pins of port 2 */ +#define PDAT2 (*(REG32_PTR_T)(0x3CF00024)) /* The data register for port 2 */ +#define PCON3 (*(REG32_PTR_T)(0x3CF00030)) /* Configures the pins of port 3 */ +#define PDAT3 (*(REG32_PTR_T)(0x3CF00034)) /* The data register for port 3 */ +#define PCON4 (*(REG32_PTR_T)(0x3CF00040)) /* Configures the pins of port 4 */ +#define PDAT4 (*(REG32_PTR_T)(0x3CF00044)) /* The data register for port 4 */ +#define PCON5 (*(REG32_PTR_T)(0x3CF00050)) /* Configures the pins of port 5 */ +#define PDAT5 (*(REG32_PTR_T)(0x3CF00054)) /* The data register for port 5 */ +#define PCON6 (*(REG32_PTR_T)(0x3CF00060)) /* Configures the pins of port 6 */ +#define PDAT6 (*(REG32_PTR_T)(0x3CF00064)) /* The data register for port 6 */ +#define PCON7 (*(REG32_PTR_T)(0x3CF00070)) /* Configures the pins of port 7 */ +#define PDAT7 (*(REG32_PTR_T)(0x3CF00074)) /* The data register for port 7 */ +#define PCON10 (*(REG32_PTR_T)(0x3CF000A0)) /* Configures the pins of port 10 */ +#define PDAT10 (*(REG32_PTR_T)(0x3CF000A4)) /* The data register for port 10 */ #define PCON_ASRAM (*(REG32_PTR_T)(0x3CF000F0)) /* Configures the pins of port nor flash */ #define PCON_SDRAM (*(REG32_PTR_T)(0x3CF000F4)) /* Configures the pins of port sdram */ #define PCON11 (*(REG32_PTR_T)(0x3CF000F8)) /* Configures the pins of port 11 */ diff --git a/firmware/target/arm/s5l8700/ata-nand-s5l8700.c b/firmware/target/arm/s5l8700/ata-nand-s5l8700.c index 8c66c14db5..ee1e581270 100644 --- a/firmware/target/arm/s5l8700/ata-nand-s5l8700.c +++ b/firmware/target/arm/s5l8700/ata-nand-s5l8700.c @@ -49,12 +49,19 @@ void nand_led(bool onoff) int nand_read_sectors(IF_MV2(int drive,) unsigned long start, int incount, void* inbuf) { - + (void)start; + (void)incount; + (void)inbuf; + return 0; } int nand_write_sectors(IF_MV2(int drive,) unsigned long start, int count, const void* outbuf) { + (void)start; + (void)count; + (void)outbuf; + return 0; } void nand_spindown(int seconds) @@ -82,8 +89,22 @@ int nand_soft_reset(void) void nand_enable(bool on) { + (void)on; +} + +void nand_get_info(IF_MV2(int drive,) struct storage_info *info) +{ + (void)info; +} + +long nand_last_disk_activity(void) +{ + return 0; } int nand_init(void) { + initialized = true; + return 0; } + diff --git a/firmware/target/arm/s5l8700/fmradio-i2c-meizu.c b/firmware/target/arm/s5l8700/fmradio-i2c-meizu.c index 5a4113a6a5..38c24511cf 100644 --- a/firmware/target/arm/s5l8700/fmradio-i2c-meizu.c +++ b/firmware/target/arm/s5l8700/fmradio-i2c-meizu.c @@ -7,7 +7,7 @@ * \/ \/ \/ \/ \/ * $Id$ * - * Copyright (C) 2008 by Bertrik Sikken + * Copyright (C) 2009 by Bertrik Sikken * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License diff --git a/firmware/target/arm/s5l8700/i2c-s5l8700.c b/firmware/target/arm/s5l8700/i2c-s5l8700.c index b2b2f37e2b..762db9abc2 100644 --- a/firmware/target/arm/s5l8700/i2c-s5l8700.c +++ b/firmware/target/arm/s5l8700/i2c-s5l8700.c @@ -33,8 +33,9 @@ * data, pointer to data to be transfered A return value < 0 indicates an error. - Known issues: - * uses polled mode (not interrupt driven), just like the OF + Note: + * blocks the calling thread for the entire duraton of the i2c transfer but + uses wakeup_wait/wakeup_signal to allow other threads to run. * ACK from slave is not checked, so functions never return an error */ diff --git a/firmware/target/arm/s5l8700/kernel-s5l8700.c b/firmware/target/arm/s5l8700/kernel-s5l8700.c index b905ade0c1..cfa13aab2c 100644 --- a/firmware/target/arm/s5l8700/kernel-s5l8700.c +++ b/firmware/target/arm/s5l8700/kernel-s5l8700.c @@ -44,7 +44,7 @@ void tick_start(unsigned int interval_in_ms) /* configure timer for 10 kHz */ TBCMD = (1 << 1); /* TB_CLR */ - TBPRE = 625; /* prescaler */ + TBPRE = 624; /* prescaler */ TBCON = (0 << 13) | /* TB_INT1_EN */ (1 << 12) | /* TB_INT0_EN */ (0 << 11) | /* TB_START */ diff --git a/firmware/target/arm/s5l8700/meizu-m3/lcd-m3.c b/firmware/target/arm/s5l8700/meizu-m3/lcd-m3.c index 01f03d3584..2c52faeb8c 100644 --- a/firmware/target/arm/s5l8700/meizu-m3/lcd-m3.c +++ b/firmware/target/arm/s5l8700/meizu-m3/lcd-m3.c @@ -72,7 +72,7 @@ static void lcd_sleep(uint32_t t) for(i=0;i