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Fix some comments, and make code consistent with comments (CSMR2 was set to 1M instead of 64K).

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11698 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold 2006-12-09 11:36:40 +00:00
parent 7ccb505488
commit 81f76f21d6
1 changed files with 3 additions and 4 deletions
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7
firmware/target/coldfire/crt0.S
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@ -72,12 +72,11 @@ start:
/* Chip select 2 - ATA controller */ /* Chip select 2 - ATA controller */
move.l #0x20000000,%d0 /* CSAR2 - Base = 0x20000000 */ move.l #0x20000000,%d0 /* CSAR2 - Base = 0x20000000 */
move.l %d0,(0x098,%a0) move.l %d0,(0x098,%a0)
move.l #0x000f0001,%d0 /* CSMR2 - 64K, Only data access */ moveq.l #0x1,%d0 /* CSMR2 - 64K */
move.l %d0,(0x09c,%a0) move.l %d0,(0x09c,%a0)
move.l #0x00000080,%d0 /* CSCR2 - no wait states, 16 bits, no bursts */ move.l #0x00000080,%d0 /* CSCR2 - no wait states, 16 bits, no bursts */
move.l %d0,(0x0a0,%a0) /* NOTE: I'm not sure about the wait states. move.l %d0,(0x0a0,%a0) /* wait states are handled by the coldfire
We have to be careful with the access times, * IDE interface logic. */
since IORDY isn't connected to the HDD. */
#if CONFIG_USBOTG == USBOTG_ISP1362 #if CONFIG_USBOTG == USBOTG_ISP1362
/* Chip select 3 - USBOTG controller */ /* Chip select 3 - USBOTG controller */