rockbox/firmware/target/mips
Marcin Bukat 027c035a4e jz4740: a few minor fixes
This was spotted while playing with qemu-jz:
1) rockbox reads TECR and TESR which are described as write-only
   registers. Datasheet doesn't mention what happens if they are
   readed. Apparently this doesn't have fatal side effects.
   It comes down to two defines from jz4740.h
   __tcu_stop_counter(n) and __tcu_start_counter(n) which use
   read-modify-write sequence.

2) rockbox accesses out of bound offset 0xd4 in DMA memspace.
   It comes from dis_irq() in system-jz4740.c. NUM_DMA is 6 but
   DMA channels are 0-5 so (irq <= IRQ_DMA_0 + NUM_DMA)) bound
   check is wrong.

This are *NOT* tested on device.

Change-Id: I29dff6a4f828030877b7d50fbcc98866478b9e3d
Reviewed-on: http://gerrit.rockbox.org/338
Reviewed-by: Bertrik Sikken <bertrik@sikken.nl>
Tested-by: Purling Nayuki <cyq.yzfl@gmail.com>
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
2013-03-11 08:33:18 +01:00
..
ingenic_jz47xx jz4740: a few minor fixes 2013-03-11 08:33:18 +01:00
mmu-mips.c Commit to certain names for cache coherency APIs and discard the aliases. 2011-12-17 07:27:24 +00:00
mmu-mips.h Commit to certain names for cache coherency APIs and discard the aliases. 2011-12-17 07:27:24 +00:00