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https://github.com/Rockbox/rockbox.git
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f64e8dc33c
I think this covers everything now, although some fields are missing enum values. Those can be added in if and when they are needed. Change-Id: Ib1a94ba9c9a5949b6a038f8c1a49786823fae58f
251 lines
11 KiB
C
251 lines
11 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 3.0.0
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* x1000 version: 1.0
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* x1000 authors: Aidan MacDonald
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*
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* Copyright (C) 2015 by the authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN_PCM_H__
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#define __HEADERGEN_PCM_H__
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#include "macro.h"
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#define REG_PCM_CTL jz_reg(PCM_CTL)
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#define JA_PCM_CTL (0xb0071000 + 0x0)
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#define JT_PCM_CTL JIO_32_RW
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#define JN_PCM_CTL PCM_CTL
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#define JI_PCM_CTL
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#define BP_PCM_CTL_ERDMA 9
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#define BM_PCM_CTL_ERDMA 0x200
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#define BF_PCM_CTL_ERDMA(v) (((v) & 0x1) << 9)
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#define BFM_PCM_CTL_ERDMA(v) BM_PCM_CTL_ERDMA
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#define BF_PCM_CTL_ERDMA_V(e) BF_PCM_CTL_ERDMA(BV_PCM_CTL_ERDMA__##e)
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#define BFM_PCM_CTL_ERDMA_V(v) BM_PCM_CTL_ERDMA
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#define BP_PCM_CTL_ETDMA 8
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#define BM_PCM_CTL_ETDMA 0x100
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#define BF_PCM_CTL_ETDMA(v) (((v) & 0x1) << 8)
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#define BFM_PCM_CTL_ETDMA(v) BM_PCM_CTL_ETDMA
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#define BF_PCM_CTL_ETDMA_V(e) BF_PCM_CTL_ETDMA(BV_PCM_CTL_ETDMA__##e)
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#define BFM_PCM_CTL_ETDMA_V(v) BM_PCM_CTL_ETDMA
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#define BP_PCM_CTL_LSMP 7
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#define BM_PCM_CTL_LSMP 0x80
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#define BF_PCM_CTL_LSMP(v) (((v) & 0x1) << 7)
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#define BFM_PCM_CTL_LSMP(v) BM_PCM_CTL_LSMP
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#define BF_PCM_CTL_LSMP_V(e) BF_PCM_CTL_LSMP(BV_PCM_CTL_LSMP__##e)
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#define BFM_PCM_CTL_LSMP_V(v) BM_PCM_CTL_LSMP
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#define BP_PCM_CTL_ERPL 6
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#define BM_PCM_CTL_ERPL 0x40
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#define BF_PCM_CTL_ERPL(v) (((v) & 0x1) << 6)
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#define BFM_PCM_CTL_ERPL(v) BM_PCM_CTL_ERPL
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#define BF_PCM_CTL_ERPL_V(e) BF_PCM_CTL_ERPL(BV_PCM_CTL_ERPL__##e)
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#define BFM_PCM_CTL_ERPL_V(v) BM_PCM_CTL_ERPL
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#define BP_PCM_CTL_EREC 5
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#define BM_PCM_CTL_EREC 0x20
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#define BF_PCM_CTL_EREC(v) (((v) & 0x1) << 5)
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#define BFM_PCM_CTL_EREC(v) BM_PCM_CTL_EREC
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#define BF_PCM_CTL_EREC_V(e) BF_PCM_CTL_EREC(BV_PCM_CTL_EREC__##e)
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#define BFM_PCM_CTL_EREC_V(v) BM_PCM_CTL_EREC
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#define BP_PCM_CTL_FLUSH 4
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#define BM_PCM_CTL_FLUSH 0x10
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#define BF_PCM_CTL_FLUSH(v) (((v) & 0x1) << 4)
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#define BFM_PCM_CTL_FLUSH(v) BM_PCM_CTL_FLUSH
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#define BF_PCM_CTL_FLUSH_V(e) BF_PCM_CTL_FLUSH(BV_PCM_CTL_FLUSH__##e)
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#define BFM_PCM_CTL_FLUSH_V(v) BM_PCM_CTL_FLUSH
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#define BP_PCM_CTL_RST 3
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#define BM_PCM_CTL_RST 0x8
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#define BF_PCM_CTL_RST(v) (((v) & 0x1) << 3)
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#define BFM_PCM_CTL_RST(v) BM_PCM_CTL_RST
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#define BF_PCM_CTL_RST_V(e) BF_PCM_CTL_RST(BV_PCM_CTL_RST__##e)
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#define BFM_PCM_CTL_RST_V(v) BM_PCM_CTL_RST
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#define BP_PCM_CTL_CLKEN 1
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#define BM_PCM_CTL_CLKEN 0x2
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#define BF_PCM_CTL_CLKEN(v) (((v) & 0x1) << 1)
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#define BFM_PCM_CTL_CLKEN(v) BM_PCM_CTL_CLKEN
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#define BF_PCM_CTL_CLKEN_V(e) BF_PCM_CTL_CLKEN(BV_PCM_CTL_CLKEN__##e)
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#define BFM_PCM_CTL_CLKEN_V(v) BM_PCM_CTL_CLKEN
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#define BP_PCM_CTL_PCMEN 0
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#define BM_PCM_CTL_PCMEN 0x1
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#define BF_PCM_CTL_PCMEN(v) (((v) & 0x1) << 0)
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#define BFM_PCM_CTL_PCMEN(v) BM_PCM_CTL_PCMEN
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#define BF_PCM_CTL_PCMEN_V(e) BF_PCM_CTL_PCMEN(BV_PCM_CTL_PCMEN__##e)
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#define BFM_PCM_CTL_PCMEN_V(v) BM_PCM_CTL_PCMEN
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#define REG_PCM_CFG jz_reg(PCM_CFG)
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#define JA_PCM_CFG (0xb0071000 + 0x4)
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#define JT_PCM_CFG JIO_32_RW
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#define JN_PCM_CFG PCM_CFG
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#define JI_PCM_CFG
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#define BP_PCM_CFG_SLOT 13
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#define BM_PCM_CFG_SLOT 0x6000
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#define BF_PCM_CFG_SLOT(v) (((v) & 0x3) << 13)
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#define BFM_PCM_CFG_SLOT(v) BM_PCM_CFG_SLOT
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#define BF_PCM_CFG_SLOT_V(e) BF_PCM_CFG_SLOT(BV_PCM_CFG_SLOT__##e)
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#define BFM_PCM_CFG_SLOT_V(v) BM_PCM_CFG_SLOT
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#define BP_PCM_CFG_RFTH 5
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#define BM_PCM_CFG_RFTH 0x1e0
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#define BF_PCM_CFG_RFTH(v) (((v) & 0xf) << 5)
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#define BFM_PCM_CFG_RFTH(v) BM_PCM_CFG_RFTH
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#define BF_PCM_CFG_RFTH_V(e) BF_PCM_CFG_RFTH(BV_PCM_CFG_RFTH__##e)
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#define BFM_PCM_CFG_RFTH_V(v) BM_PCM_CFG_RFTH
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#define BP_PCM_CFG_TFTH 1
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#define BM_PCM_CFG_TFTH 0x1e
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#define BF_PCM_CFG_TFTH(v) (((v) & 0xf) << 1)
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#define BFM_PCM_CFG_TFTH(v) BM_PCM_CFG_TFTH
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#define BF_PCM_CFG_TFTH_V(e) BF_PCM_CFG_TFTH(BV_PCM_CFG_TFTH__##e)
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#define BFM_PCM_CFG_TFTH_V(v) BM_PCM_CFG_TFTH
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#define BP_PCM_CFG_ISS 12
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#define BM_PCM_CFG_ISS 0x1000
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#define BF_PCM_CFG_ISS(v) (((v) & 0x1) << 12)
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#define BFM_PCM_CFG_ISS(v) BM_PCM_CFG_ISS
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#define BF_PCM_CFG_ISS_V(e) BF_PCM_CFG_ISS(BV_PCM_CFG_ISS__##e)
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#define BFM_PCM_CFG_ISS_V(v) BM_PCM_CFG_ISS
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#define BP_PCM_CFG_OSS 11
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#define BM_PCM_CFG_OSS 0x800
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#define BF_PCM_CFG_OSS(v) (((v) & 0x1) << 11)
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#define BFM_PCM_CFG_OSS(v) BM_PCM_CFG_OSS
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#define BF_PCM_CFG_OSS_V(e) BF_PCM_CFG_OSS(BV_PCM_CFG_OSS__##e)
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#define BFM_PCM_CFG_OSS_V(v) BM_PCM_CFG_OSS
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#define BP_PCM_CFG_IMSBPOS 10
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#define BM_PCM_CFG_IMSBPOS 0x400
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#define BF_PCM_CFG_IMSBPOS(v) (((v) & 0x1) << 10)
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#define BFM_PCM_CFG_IMSBPOS(v) BM_PCM_CFG_IMSBPOS
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#define BF_PCM_CFG_IMSBPOS_V(e) BF_PCM_CFG_IMSBPOS(BV_PCM_CFG_IMSBPOS__##e)
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#define BFM_PCM_CFG_IMSBPOS_V(v) BM_PCM_CFG_IMSBPOS
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#define BP_PCM_CFG_OMSBPOS 9
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#define BM_PCM_CFG_OMSBPOS 0x200
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#define BF_PCM_CFG_OMSBPOS(v) (((v) & 0x1) << 9)
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#define BFM_PCM_CFG_OMSBPOS(v) BM_PCM_CFG_OMSBPOS
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#define BF_PCM_CFG_OMSBPOS_V(e) BF_PCM_CFG_OMSBPOS(BV_PCM_CFG_OMSBPOS__##e)
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#define BFM_PCM_CFG_OMSBPOS_V(v) BM_PCM_CFG_OMSBPOS
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#define BP_PCM_CFG_PCMMOD 0
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#define BM_PCM_CFG_PCMMOD 0x1
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#define BF_PCM_CFG_PCMMOD(v) (((v) & 0x1) << 0)
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#define BFM_PCM_CFG_PCMMOD(v) BM_PCM_CFG_PCMMOD
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#define BF_PCM_CFG_PCMMOD_V(e) BF_PCM_CFG_PCMMOD(BV_PCM_CFG_PCMMOD__##e)
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#define BFM_PCM_CFG_PCMMOD_V(v) BM_PCM_CFG_PCMMOD
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#define REG_PCM_DP jz_reg(PCM_DP)
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#define JA_PCM_DP (0xb0071000 + 0x8)
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#define JT_PCM_DP JIO_32_RW
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#define JN_PCM_DP PCM_DP
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#define JI_PCM_DP
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#define REG_PCM_INTC jz_reg(PCM_INTC)
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#define JA_PCM_INTC (0xb0071000 + 0xc)
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#define JT_PCM_INTC JIO_32_RW
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#define JN_PCM_INTC PCM_INTC
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#define JI_PCM_INTC
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#define BP_PCM_INTC_ETFS 3
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#define BM_PCM_INTC_ETFS 0x8
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#define BF_PCM_INTC_ETFS(v) (((v) & 0x1) << 3)
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#define BFM_PCM_INTC_ETFS(v) BM_PCM_INTC_ETFS
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#define BF_PCM_INTC_ETFS_V(e) BF_PCM_INTC_ETFS(BV_PCM_INTC_ETFS__##e)
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#define BFM_PCM_INTC_ETFS_V(v) BM_PCM_INTC_ETFS
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#define BP_PCM_INTC_ETUR 2
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#define BM_PCM_INTC_ETUR 0x4
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#define BF_PCM_INTC_ETUR(v) (((v) & 0x1) << 2)
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#define BFM_PCM_INTC_ETUR(v) BM_PCM_INTC_ETUR
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#define BF_PCM_INTC_ETUR_V(e) BF_PCM_INTC_ETUR(BV_PCM_INTC_ETUR__##e)
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#define BFM_PCM_INTC_ETUR_V(v) BM_PCM_INTC_ETUR
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#define BP_PCM_INTC_ERFS 1
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#define BM_PCM_INTC_ERFS 0x2
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#define BF_PCM_INTC_ERFS(v) (((v) & 0x1) << 1)
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#define BFM_PCM_INTC_ERFS(v) BM_PCM_INTC_ERFS
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#define BF_PCM_INTC_ERFS_V(e) BF_PCM_INTC_ERFS(BV_PCM_INTC_ERFS__##e)
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#define BFM_PCM_INTC_ERFS_V(v) BM_PCM_INTC_ERFS
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#define BP_PCM_INTC_EROR 0
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#define BM_PCM_INTC_EROR 0x1
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#define BF_PCM_INTC_EROR(v) (((v) & 0x1) << 0)
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#define BFM_PCM_INTC_EROR(v) BM_PCM_INTC_EROR
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#define BF_PCM_INTC_EROR_V(e) BF_PCM_INTC_EROR(BV_PCM_INTC_EROR__##e)
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#define BFM_PCM_INTC_EROR_V(v) BM_PCM_INTC_EROR
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#define REG_PCM_INTS jz_reg(PCM_INTS)
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#define JA_PCM_INTS (0xb0071000 + 0x10)
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#define JT_PCM_INTS JIO_32_RW
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#define JN_PCM_INTS PCM_INTS
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#define JI_PCM_INTS
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#define BP_PCM_INTS_TFL 9
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#define BM_PCM_INTS_TFL 0x3e00
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#define BF_PCM_INTS_TFL(v) (((v) & 0x1f) << 9)
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#define BFM_PCM_INTS_TFL(v) BM_PCM_INTS_TFL
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#define BF_PCM_INTS_TFL_V(e) BF_PCM_INTS_TFL(BV_PCM_INTS_TFL__##e)
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#define BFM_PCM_INTS_TFL_V(v) BM_PCM_INTS_TFL
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#define BP_PCM_INTS_RSTS 14
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#define BM_PCM_INTS_RSTS 0x4000
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#define BF_PCM_INTS_RSTS(v) (((v) & 0x1) << 14)
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#define BFM_PCM_INTS_RSTS(v) BM_PCM_INTS_RSTS
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#define BF_PCM_INTS_RSTS_V(e) BF_PCM_INTS_RSTS(BV_PCM_INTS_RSTS__##e)
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#define BFM_PCM_INTS_RSTS_V(v) BM_PCM_INTS_RSTS
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#define BP_PCM_INTS_TFS 8
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#define BM_PCM_INTS_TFS 0x100
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#define BF_PCM_INTS_TFS(v) (((v) & 0x1) << 8)
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#define BFM_PCM_INTS_TFS(v) BM_PCM_INTS_TFS
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#define BF_PCM_INTS_TFS_V(e) BF_PCM_INTS_TFS(BV_PCM_INTS_TFS__##e)
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#define BFM_PCM_INTS_TFS_V(v) BM_PCM_INTS_TFS
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#define BP_PCM_INTS_TUR 7
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#define BM_PCM_INTS_TUR 0x80
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#define BF_PCM_INTS_TUR(v) (((v) & 0x1) << 7)
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#define BFM_PCM_INTS_TUR(v) BM_PCM_INTS_TUR
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#define BF_PCM_INTS_TUR_V(e) BF_PCM_INTS_TUR(BV_PCM_INTS_TUR__##e)
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#define BFM_PCM_INTS_TUR_V(v) BM_PCM_INTS_TUR
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#define BP_PCM_INTS_RFL 2
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#define BM_PCM_INTS_RFL 0x7c
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#define BF_PCM_INTS_RFL(v) (((v) & 0x1f) << 2)
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#define BFM_PCM_INTS_RFL(v) BM_PCM_INTS_RFL
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#define BF_PCM_INTS_RFL_V(e) BF_PCM_INTS_RFL(BV_PCM_INTS_RFL__##e)
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#define BFM_PCM_INTS_RFL_V(v) BM_PCM_INTS_RFL
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#define BP_PCM_INTS_RFS 1
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#define BM_PCM_INTS_RFS 0x2
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#define BF_PCM_INTS_RFS(v) (((v) & 0x1) << 1)
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#define BFM_PCM_INTS_RFS(v) BM_PCM_INTS_RFS
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#define BF_PCM_INTS_RFS_V(e) BF_PCM_INTS_RFS(BV_PCM_INTS_RFS__##e)
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#define BFM_PCM_INTS_RFS_V(v) BM_PCM_INTS_RFS
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#define BP_PCM_INTS_ROR 0
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#define BM_PCM_INTS_ROR 0x1
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#define BF_PCM_INTS_ROR(v) (((v) & 0x1) << 0)
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#define BFM_PCM_INTS_ROR(v) BM_PCM_INTS_ROR
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#define BF_PCM_INTS_ROR_V(e) BF_PCM_INTS_ROR(BV_PCM_INTS_ROR__##e)
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#define BFM_PCM_INTS_ROR_V(v) BM_PCM_INTS_ROR
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#define REG_PCM_DIV jz_reg(PCM_DIV)
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#define JA_PCM_DIV (0xb0071000 + 0x14)
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#define JT_PCM_DIV JIO_32_RW
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#define JN_PCM_DIV PCM_DIV
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#define JI_PCM_DIV
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#define BP_PCM_DIV_SYNL 11
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#define BM_PCM_DIV_SYNL 0x1f800
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#define BF_PCM_DIV_SYNL(v) (((v) & 0x3f) << 11)
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#define BFM_PCM_DIV_SYNL(v) BM_PCM_DIV_SYNL
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#define BF_PCM_DIV_SYNL_V(e) BF_PCM_DIV_SYNL(BV_PCM_DIV_SYNL__##e)
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#define BFM_PCM_DIV_SYNL_V(v) BM_PCM_DIV_SYNL
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#define BP_PCM_DIV_SYNDIV 6
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#define BM_PCM_DIV_SYNDIV 0x7c0
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#define BF_PCM_DIV_SYNDIV(v) (((v) & 0x1f) << 6)
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#define BFM_PCM_DIV_SYNDIV(v) BM_PCM_DIV_SYNDIV
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#define BF_PCM_DIV_SYNDIV_V(e) BF_PCM_DIV_SYNDIV(BV_PCM_DIV_SYNDIV__##e)
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#define BFM_PCM_DIV_SYNDIV_V(v) BM_PCM_DIV_SYNDIV
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#define BP_PCM_DIV_CLKDIV 0
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#define BM_PCM_DIV_CLKDIV 0x3f
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#define BF_PCM_DIV_CLKDIV(v) (((v) & 0x3f) << 0)
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#define BFM_PCM_DIV_CLKDIV(v) BM_PCM_DIV_CLKDIV
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#define BF_PCM_DIV_CLKDIV_V(e) BF_PCM_DIV_CLKDIV(BV_PCM_DIV_CLKDIV__##e)
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#define BFM_PCM_DIV_CLKDIV_V(v) BM_PCM_DIV_CLKDIV
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#endif /* __HEADERGEN_PCM_H__*/
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