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https://github.com/Rockbox/rockbox.git
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9e2c85e076
This is part of the preparation to add support for iPod Nano 3G and Nano 4G. There are some optimisations left, like merging similar blocks of registers that share the same layout, but the base address have changed between SoC generations. Change-Id: I4f06727b4061977141b65d39ae19591bd5b29680
129 lines
3 KiB
C
129 lines
3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2014 by Cástor Muñoz
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "config.h"
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#include "system.h"
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#include "s5l87xx.h"
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#include "uc87xx.h"
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/*
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* XXX: This code is based on datasheets and NEVER TESTED !!!
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*/
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/*
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* s5l8700 UC87XX HW: 1 UARTC, 2 ports
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*/
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static struct uartc_port *uartc_port_l[UARTC_N_PORTS];
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const struct uartc s5l8700_uartc =
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{
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.id = 0,
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.baddr = UARTC_BASE_ADDR,
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.port_off = UARTC_PORT_OFFSET,
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.n_ports = UARTC_N_PORTS,
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.port_l = uartc_port_l,
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};
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static int intmsk_uart[S5L8700_N_PORTS] = { INTMSK_UART0, INTMSK_UART1 };
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/*
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* Device level functions specific to S5L8700
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*/
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void uart_target_enable_gpio(int uart_id, int port_id)
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{
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(void) uart_id;
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switch (port_id) {
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/* configure UARTx Tx/Rx GPIO ports */
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case 0:
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PCON0 = (PCON0 & 0x0fff) | 0xa000;
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break;
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case 1:
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PCON6 = (PCON6 & 0xfff00fff) | 0x00044000;
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break;
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}
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}
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void uart_target_disable_gpio(int uart_id, int port_id)
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{
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(void) uart_id;
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switch (port_id) {
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/* configure default reset values */
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case 0:
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PCON0 = (PCON0 & 0x0fff) | 0x0000;
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break;
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case 1:
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PCON6 = (PCON6 & 0xfff00fff) | 0x00000000;
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break;
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}
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}
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void uart_target_enable_irq(int uart_id, int port_id)
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{
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(void) uart_id;
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INTMSK |= intmsk_uart[port_id];
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}
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void uart_target_disable_irq(int uart_id, int port_id)
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{
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(void) uart_id;
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INTMSK &= ~intmsk_uart[port_id];
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}
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void uart_target_clear_irq(int uart_id, int port_id)
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{
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(void) uart_id;
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SRCPND |= intmsk_uart[port_id];
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}
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void uart_target_enable_clocks(int uart_id)
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{
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(void) uart_id;
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PWRCON &= ~(1 << CLOCKGATE_UARTC);
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}
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void uart_target_disable_clocks(int uart_id)
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{
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(void) uart_id;
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PWRCON |= (1 << CLOCKGATE_UARTC);
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}
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/*
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* ISRs
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*/
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void ICODE_ATTR INT_UART0(void)
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{
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uartc_callback(&s5l8700_uartc, 0);
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}
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void ICODE_ATTR INT_UART1(void)
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{
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uartc_callback(&s5l8700_uartc, 1);
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}
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/* Main init */
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void uart_init(void)
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{
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uartc_open(&s5l8700_uartc);
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}
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