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Upstream's OPUS_ARM_INLINE_ASM means any ARM with inline assembly, with OPUS_ARM_INLINE_EDSP layered on top for ARMv5E. config.h instead defines exactly one of them per core, so the names read as broader than they are, and code added ARM_ARCH tests beside them to pin the scope down. Renamed to OPUS_ARM_ASM_ARMV4_ONLY and OPUS_ARM_ASM_ARMV5E_AND_LATER throughout celt and silk, upstream files included; README.rockbox records it for the next libopus sync. No code change: opus.elf disassembly and section sizes are identical before and after on ARMv4 (e200v1), ARMv5E (Clip+) and ARMv6 (iPod Nano 4G). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Change-Id: I89932d348dedd76748a1bc7b3f2e7de1c5be49c8
132 lines
4 KiB
C
132 lines
4 KiB
C
#ifndef CONFIG_H
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#define CONFIG_H
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/* rbcodecconfig.h pulls in the firmware config.h, which is assembly-safe and
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is what the kernels under celt/arm come here for. Everything below it is
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C, so the .S files skip it. */
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#include "rbcodecconfig.h"
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#ifndef __ASSEMBLER__
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#include "codeclib.h"
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#include "ogg/ogg.h"
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#endif
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/* general stuff */
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#define OPUS_BUILD
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/* Rockbox decodes Opus and never encodes it: neither celt_encoder.c nor
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opus_encoder.c is listed in SOURCES. Saying so lets gcc fold away the
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encoder halves of the routines celt/bands.c shares between the two
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directions, which is worth 2,976 bytes of code and, because those branches
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were holding values live across quant_partition's recursive calls, a
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measurable amount of its stack spill. celt_encoder.c carries an #error
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against this define, so adding an encoder back fails the build loudly
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rather than miscompiling. */
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#define CELT_DECODE_ONLY
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/* Code in IRAM. PP5022 and PP5024 give a codec an 80 KB IRAM window and Opus
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already spends 39 KB of it on tables and .ibss; the hot decode path is
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about 34 KB of code, so it fits with room over. Every other PP has a 48 KB
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window, which the tables would leave too little of, and the AS3525 codec
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link defines no IRAM region at all because the whole codec already runs
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from IRAM there. libcook splits the same way, for the same reason.
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Measured on a Sansa e200v1: 48.96 MHz to 42.92, a 12.3% cut that the cycle
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model cannot see at all, because it does not model an instruction cache.
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Define OPUS_NO_ICODE to build without it and compare. */
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#if (CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024) && !defined(OPUS_NO_ICODE)
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#define OPUS_ARM_ICODE /* also read by the .S kernels */
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#endif
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#ifndef __ASSEMBLER__
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#ifdef OPUS_ARM_ICODE
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#define ICODE_ATTR_OPUS ICODE_ATTR
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#else
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#define ICODE_ATTR_OPUS
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#endif
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#endif
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/* alloc stuff */
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#define VAR_ARRAYS
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#define NORM_ALIASING_HACK
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#define OVERRIDE_OPUS_ALLOC
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#define OVERRIDE_OPUS_FREE
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#define OVERRIDE_OPUS_ALLOC_SCRATCH
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#define opus_alloc _ogg_malloc
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#define opus_free _ogg_free
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#define opus_alloc_scratch _ogg_malloc
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/* lrint */
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#define HAVE_LRINTF 0
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#define HAVE_LRINT 0
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/* embedded stuff */
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#define FIXED_POINT
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#define DISABLE_FLOAT_API
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#define EMBEDDED_ARM 1
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/* undefinitions */
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#ifdef ABS
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#undef ABS
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#endif
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#ifdef MIN
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#undef MIN
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#endif
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#ifdef MAX
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#undef MAX
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#endif
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#if defined(CPU_ARM)
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#define OPUS_ARM_ASM
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/* Upstream's OPUS_ARM_INLINE_ASM and OPUS_ARM_INLINE_EDSP, renamed: upstream
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layers EDSP on top of ASM, but here exactly one is defined per core. */
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#if ARM_ARCH == 4
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#define OPUS_ARM_ASM_ARMV4_ONLY
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#elif ARM_ARCH > 4
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#define OPUS_ARM_ASM_ARMV5E_AND_LATER
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#if (ARCH_PROFILE == ARM_PROFILE_MICRO)
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#define OPUS_ARM_NO_FFT_ASM
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#define OPUS_ARM_NO_MDCT_ASM
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#define OPUS_ARM_NO_PITCH_ASM
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#define OPUS_NO_PFA
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#define OPUS_ARM_NO_COMB_ASM
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#define OPUS_ARM_NO_BANDS_ASM
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#endif
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#endif /* ARM_ARCH */
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/*optimization no hardware division support*/
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#if !defined(ARM_HAVE_HW_DIV)
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#define OPUS_EC_DECODE_DIV
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#endif
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/* Exact lookup table for bitexact_log2tan. Saves about 0.25 MHz if the
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tables can live in IRAM, which only the ARMv4 PP5022/PP5024 have room for,
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and nothing otherwise, so it is only built there. */
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#if CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
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#define OPUS_LOG2TAN_TABLE
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#endif
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#endif
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/* Good-Thomas FFT for the backward MDCT. Every 48 kHz CELT transform length
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is 15 times a power of two, so the prime factor algorithm applies and the
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inter-stage twiddles -- 73% of the FFT multiplies -- disappear. Define
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OPUS_NO_PFA to fall back to the mixed-radix chain. */
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#ifndef OPUS_NO_PFA
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#define OPUS_PFA
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#endif
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/* Mixed-radix leftovers: built, but not worth IRAM once the prime
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factor transform makes them unreachable. */
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#ifdef OPUS_PFA
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#define ICODE_ATTR_OPUS_MR
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#define ICONST_ATTR_OPUS_MR
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#else
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#define ICODE_ATTR_OPUS_MR ICODE_ATTR_OPUS
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#define ICONST_ATTR_OPUS_MR ICONST_ATTR
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#endif
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#if defined(CPU_COLDFIRE)
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#define OPUS_CF_INLINE_ASM
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#endif
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#endif /* CONFIG_H */
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