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c47b2e1be2
Upstream's OPUS_ARM_INLINE_ASM means any ARM with inline assembly, with OPUS_ARM_INLINE_EDSP layered on top for ARMv5E. config.h instead defines exactly one of them per core, so the names read as broader than they are, and code added ARM_ARCH tests beside them to pin the scope down. Renamed to OPUS_ARM_ASM_ARMV4_ONLY and OPUS_ARM_ASM_ARMV5E_AND_LATER throughout celt and silk, upstream files included; README.rockbox records it for the next libopus sync. No code change: opus.elf disassembly and section sizes are identical before and after on ARMv4 (e200v1), ARMv5E (Clip+) and ARMv6 (iPod Nano 4G). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Change-Id: I89932d348dedd76748a1bc7b3f2e7de1c5be49c8
63 lines
2.6 KiB
C
63 lines
2.6 KiB
C
/* Copyright (c) 2025 Xiph.Org Foundation and contributors
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Copyright (c) 2026 Michael Giacomelli
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BANDS_ARM_H
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#define BANDS_ARM_H
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/* Hand-written inner loops for celt/bands.c on both ARM generations. See
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celt/arm/denorm_armv4_asm.S and denorm_armv5e_asm.S. Both are bit-exact
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with the C they replace.
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Build with OPUS_ARM_NO_BANDS_ASM to select the C loops instead, which is
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how the two are compared. */
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#if defined(FIXED_POINT) && !defined(OPUS_ARM_NO_BANDS_ASM)
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# if defined(OPUS_ARM_ASM_ARMV4_ONLY) && (ARM_ARCH == 4)
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# define OVERRIDE_DENORM_BAND
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void denorm_band_armv4(celt_sig *f, const celt_norm *x, int n, int g,
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int shift);
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# define DENORM_BAND denorm_band_armv4
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# elif defined(OPUS_ARM_ASM_ARMV5E_AND_LATER) && (ARM_ARCH >= 5)
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# define OVERRIDE_DENORM_BAND
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void denorm_band_armv5e(celt_sig *f, const celt_norm *x, int n, int g,
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int shift);
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# define DENORM_BAND denorm_band_armv5e
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/* ARMv5E only: on ARMv4 haar1 is multiply-bound and gains only the hoisted
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rounding add. bands.h has already declared haar1 by this point, so the
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macro renames the calls and the guarded C definition drops out. */
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# define OVERRIDE_haar1
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void haar1_armv5e(celt_norm *X, int N0, int stride);
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# define haar1(X, N0, stride) haar1_armv5e((X), (N0), (stride))
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# endif
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#endif
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#endif /* BANDS_ARM_H */
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