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FCLK is unused because we use fastbus clocking: CPU clock = PCLK Base PCLK off PLLA and use the lowest frqeuency for FCLK (24MHz source, maximum divider) Save a bit of power, adjust Clipv1/e200v2/Fuzev1 current usage accordingly Note: the power saving (in mA) is a bit less on e200v2/Fuzev1 than on Clipv1 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28000 a1c6a512-1295-4272-9138-f99709370657 |
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