mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-10-13 18:17:39 -04:00
b71fb1f12a
ata-creativezen looks like a legit memory-trashing bug, the rtc fixes are bitwise inversion of a bool, and the remaining are just unused static variables. Change-Id: I1a818d4839cd3a54ca6e85f26feb743a4a9d29dc
366 lines
11 KiB
C
366 lines
11 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald, Dana Conrad
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "lcd.h"
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#include "kernel.h"
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#include "lcd-x1000.h"
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#include "gpio-x1000.h"
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#include "system.h"
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#include "devicedata.h"
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/* for reference on these command/data hex values, see the mipi dcs lcd spec. *
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* Not everything here is there, but all the standard stuff is. */
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/* New Display Eroq 2.1 / Hifiwalker 1.7+ / Surfans v3.2, unknown Controller *
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* (partially GC9A01 register compatible) *
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* https://espruino.microcosm.app/api/v1/files/ \ *
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* 9dc1b976d621a2ab3854312cce862c4a9a50dc1b.html#GC9A01 , *
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* https://www.buydisplay.com/download/ic/GC9A01A.pdf , *
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* https://lcddisplay.co/wp-content/uploads/2023/02/GC9A01.pdf *
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* Init sequence From 'EROS Q （c口）_V2.1_20231209固件.zip' *
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* update.upt/.iso -> In 'uboot.bin' at 0x52da0-0x5305f *
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* http://www.eroshifi.com/download/firmware/122.html */
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#if !defined(BOOTLOADER) || (EROSQN_VER >= 3)
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static const uint32_t erosqnative_lcd_cmd_enable_v3[] = {
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/* Unlock EXTC? */
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LCD_INSTR_CMD, 0xfe, // Inter Register Enable1
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LCD_INSTR_CMD, 0xef, // Inter Register Enable2
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LCD_INSTR_CMD, 0x36, // Memory Access Control
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/* Bit7 1:vertical flip 0:no vertical flip
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Bit6 1:horizontal flip 0:no horizontal flip
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Bit3 1:BGR 0:RGB */
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LCD_INSTR_DAT, 0x90,
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/* Pixel Format Set */
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LCD_INSTR_CMD, 0x3a,
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LCD_INSTR_DAT, 0x55, /* Rockbox uses 16pp, OF specified 18 bpp */
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LCD_INSTR_CMD, 0x84, // ?? (undocumented)
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LCD_INSTR_DAT, 0x04,
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LCD_INSTR_CMD, 0x86, // ??
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LCD_INSTR_DAT, 0xfb,
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LCD_INSTR_CMD, 0x87, // ??
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LCD_INSTR_DAT, 0x79,
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LCD_INSTR_CMD, 0x89, // ??
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LCD_INSTR_DAT, 0x0b,
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LCD_INSTR_CMD, 0x8a, // ??
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LCD_INSTR_DAT, 0x20,
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LCD_INSTR_CMD, 0x8b, // ??
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LCD_INSTR_DAT, 0x80,
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LCD_INSTR_CMD, 0x8d, // ??
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LCD_INSTR_DAT, 0x3b,
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LCD_INSTR_CMD, 0x8e, // ??
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LCD_INSTR_DAT, 0xcf,
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LCD_INSTR_CMD, 0xec, // Charge Pump Frequent Control
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LCD_INSTR_DAT, 0x33,
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LCD_INSTR_DAT, 0x02,
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LCD_INSTR_DAT, 0x4c,
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LCD_INSTR_CMD, 0x98, // ?? (undocumented)
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LCD_INSTR_DAT, 0x3e,
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LCD_INSTR_CMD, 0x9c, // ??
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LCD_INSTR_DAT, 0x4b,
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LCD_INSTR_CMD, 0x99, // ??
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LCD_INSTR_DAT, 0x3e,
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LCD_INSTR_CMD, 0x9d, // ??
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LCD_INSTR_DAT, 0x4b,
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LCD_INSTR_CMD, 0x9b, // ??
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LCD_INSTR_DAT, 0x55,
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LCD_INSTR_CMD, 0xe8, // Frame Rate
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LCD_INSTR_DAT, 0x11,
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LCD_INSTR_DAT, 0x00,
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LCD_INSTR_CMD, 0xff, // ?? (Adafruit & Co lib. C:0xFF, D:0x60, D:0x01, D:0x04)
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LCD_INSTR_DAT, 0x62, // LCD_INSTR_DAT, 0x01, LCD_INSTR_DAT, 0x04,
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LCD_INSTR_CMD, 0xc3, // Vreg1a voltage Control
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LCD_INSTR_DAT, 0x20,
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LCD_INSTR_CMD, 0xc4, // Vreg1b voltage Control
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LCD_INSTR_DAT, 0x03,
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LCD_INSTR_CMD, 0xc9, // Vreg2a voltage Control
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LCD_INSTR_DAT, 0x2a,
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LCD_INSTR_CMD, 0xf0, // SET_GAMMA1
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LCD_INSTR_DAT, 0x4a,
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LCD_INSTR_DAT, 0x10,
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LCD_INSTR_DAT, 0x0a,
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LCD_INSTR_DAT, 0x0a,
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LCD_INSTR_DAT, 0x26,
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LCD_INSTR_DAT, 0x39,
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LCD_INSTR_CMD, 0xf2, // SET_GAMMA3
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LCD_INSTR_DAT, 0x4a,
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LCD_INSTR_DAT, 0x10,
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LCD_INSTR_DAT, 0x0a,
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LCD_INSTR_DAT, 0x0a,
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LCD_INSTR_DAT, 0x26,
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LCD_INSTR_DAT, 0x39,
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LCD_INSTR_CMD, 0xf1, // SET_GAMMA2
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LCD_INSTR_DAT, 0x50,
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LCD_INSTR_DAT, 0x8f,
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LCD_INSTR_DAT, 0xaf,
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LCD_INSTR_DAT, 0x3b,
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LCD_INSTR_DAT, 0x3f,
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LCD_INSTR_DAT, 0x7f,
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LCD_INSTR_CMD, 0xf3, // SET_GAMMA4
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LCD_INSTR_DAT, 0x50,
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LCD_INSTR_DAT, 0x8f,
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LCD_INSTR_DAT, 0xaf,
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LCD_INSTR_DAT, 0x3b,
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LCD_INSTR_DAT, 0x3f,
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LCD_INSTR_DAT, 0x7f,
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LCD_INSTR_CMD, 0xba, // TE Control
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LCD_INSTR_DAT, 0x0a,
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#ifdef BOOTLOADER
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LCD_INSTR_CMD, 0x35, // Tearing Effect Line ON
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LCD_INSTR_DAT, 0x00,
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#endif
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LCD_INSTR_CMD, 0x21, /* Invert */
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/* Lock EXTC? */
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LCD_INSTR_CMD, 0xfe, // Inter Register Enable1
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LCD_INSTR_CMD, 0xee,
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/* Exit Sleep */
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LCD_INSTR_CMD, 0x11,
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LCD_INSTR_UDELAY, 120000,
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/* Display On */
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LCD_INSTR_CMD, 0x29,
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LCD_INSTR_UDELAY, 20000,
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LCD_INSTR_END,
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};
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#endif
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#if !defined(BOOTLOADER) || (EROSQN_VER < 3)
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/* Original Display / Hifiwalker -1.5 / Surfans -2.7 */
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static const uint32_t erosqnative_lcd_cmd_enable_v1[] = {
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/* Set EXTC? */
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LCD_INSTR_CMD, 0xc8,
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LCD_INSTR_DAT, 0xff,
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LCD_INSTR_DAT, 0x93,
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LCD_INSTR_DAT, 0x42,
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/* Set Address Mode */
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LCD_INSTR_CMD, 0x36,
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LCD_INSTR_DAT, 0xd8,
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/* Pixel Format Set */
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LCD_INSTR_CMD, 0x3a,
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//LCD_INSTR_DAT, 0x66, /* OF specified 18 bpp */
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LCD_INSTR_DAT, 0x05, /* RB seems to be happier dealing with 16 bits/pixel */
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/* Power Control 1? */
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LCD_INSTR_CMD, 0xc0,
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LCD_INSTR_DAT, 0x15,
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LCD_INSTR_DAT, 0x15,
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/* Power Control 2? */
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LCD_INSTR_CMD, 0xc1,
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LCD_INSTR_DAT, 0x01,
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/* VCOM? */
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LCD_INSTR_CMD, 0xc5,
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LCD_INSTR_DAT, 0xda,
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/* ?? */
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LCD_INSTR_CMD, 0xb1,
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LCD_INSTR_DAT, 0x00,
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LCD_INSTR_DAT, 0x1b,
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/* ?? */
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LCD_INSTR_CMD, 0xb4,
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LCD_INSTR_DAT, 0x02,
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/* Positive gamma correction? */
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LCD_INSTR_CMD, 0xe0,
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LCD_INSTR_DAT, 0x0f,
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LCD_INSTR_DAT, 0x13,
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LCD_INSTR_DAT, 0x17,
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LCD_INSTR_DAT, 0x04,
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LCD_INSTR_DAT, 0x13,
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LCD_INSTR_DAT, 0x07,
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LCD_INSTR_DAT, 0x40,
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LCD_INSTR_DAT, 0x39,
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LCD_INSTR_DAT, 0x4f,
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LCD_INSTR_DAT, 0x06,
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LCD_INSTR_DAT, 0x0d,
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LCD_INSTR_DAT, 0x0a,
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LCD_INSTR_DAT, 0x1f,
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LCD_INSTR_DAT, 0x22,
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LCD_INSTR_DAT, 0x00,
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/* Negative gamma correction? */
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LCD_INSTR_CMD, 0xe1,
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LCD_INSTR_DAT, 0x00,
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LCD_INSTR_DAT, 0x21,
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LCD_INSTR_DAT, 0x24,
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LCD_INSTR_DAT, 0x03,
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LCD_INSTR_DAT, 0x0f,
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LCD_INSTR_DAT, 0x05,
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LCD_INSTR_DAT, 0x38,
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LCD_INSTR_DAT, 0x32,
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LCD_INSTR_DAT, 0x49,
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LCD_INSTR_DAT, 0x00,
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LCD_INSTR_DAT, 0x09,
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LCD_INSTR_DAT, 0x08,
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LCD_INSTR_DAT, 0x32,
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LCD_INSTR_DAT, 0x35,
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LCD_INSTR_DAT, 0x0f,
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/* Exit Sleep */
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LCD_INSTR_CMD, 0x11,
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LCD_INSTR_UDELAY, 120000,
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/* Display On */
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LCD_INSTR_CMD, 0x29,
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LCD_INSTR_UDELAY, 20000,
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LCD_INSTR_END,
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};
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#endif
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static const uint32_t erosqnative_lcd_of_compat_cmd[] = {
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/* Pixel Format Set */
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LCD_INSTR_CMD, 0x3a,
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LCD_INSTR_DAT, 0x66, /* 18 bpp */
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/* Exit Sleep */
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LCD_INSTR_CMD, 0x11,
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LCD_INSTR_UDELAY, 120000,
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/* Display On */
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LCD_INSTR_CMD, 0x29,
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LCD_INSTR_UDELAY, 20000,
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LCD_INSTR_END,
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};
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/* sleep and wake copied directly from m3k */
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static const uint32_t erosqnative_lcd_cmd_sleep[] = {
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/* Display OFF */
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LCD_INSTR_CMD, 0x28,
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/* Sleep IN */
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LCD_INSTR_CMD, 0x10,
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LCD_INSTR_UDELAY, 5000,
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LCD_INSTR_END,
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};
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static const uint32_t erosqnative_lcd_cmd_wake[] = {
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/* Sleep OUT */
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LCD_INSTR_CMD, 0x11,
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LCD_INSTR_UDELAY, 5000,
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/* Display ON */
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LCD_INSTR_CMD, 0x29,
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LCD_INSTR_END,
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};
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/* As far as I can tell, this is a sequence of commands sent before each
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* DMA set. Original in OF was:
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* {0x2c, 0x2c, 0x2c, 0x2c}
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* But this set from the m3k seems to work the same, and makes more sense
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* to me:
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* {0x00, 0x00, 0x00, 0x2c}
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* This command is more than likely going to be the same
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* for any old mipi lcd on the market, maybe. I really don't think we need
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* to send "write_memory_start four times in a row. */
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static const uint8_t __attribute__((aligned(64)))
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erosqnative_lcd_dma_wr_cmd[] = {0x2c, 0x2c, 0x2c, 0x2c};
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const struct lcd_tgt_config lcd_tgt_config = {
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.bus_width = 8,
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.cmd_width = 8,
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.use_6800_mode = 0,
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.use_serial = 0,
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.clk_polarity = 0,
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.dc_polarity = 0,
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.wr_polarity = 1,
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.te_enable = 0, /* OF had TE enabled (1) */
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.te_polarity = 1,
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.te_narrow = 0,
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.dma_wr_cmd_buf = &erosqnative_lcd_dma_wr_cmd,
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.dma_wr_cmd_size = sizeof(erosqnative_lcd_dma_wr_cmd),
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};
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void lcd_tgt_enable(bool enable)
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{
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if(enable) {
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/* power up the panel */
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#ifdef BOOTLOADER
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# if EROSQN_VER <= 3
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gpio_set_level(GPIO_LCD_PWR_HW1, 1);
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# endif
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#else
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if (device_data.hw_rev <= 3)
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{
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gpio_set_level(GPIO_LCD_PWR_HW1, 1);
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}
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#endif
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mdelay(20);
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gpio_set_level(GPIO_LCD_RESET, 1);
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mdelay(12);
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/* set the clock */
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lcd_set_clock(X1000_CLK_SCLK_A, 20000000);
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/* toggle chip select low (active) */
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gpio_set_level(GPIO_LCD_RD, 1);
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gpio_set_level(GPIO_LCD_CE, 1);
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mdelay(5);
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gpio_set_level(GPIO_LCD_CE, 0);
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#ifdef BOOTLOADER
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# if EROSQN_VER >= 3
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lcd_exec_commands(&erosqnative_lcd_cmd_enable_v3[0]);
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# else
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lcd_exec_commands(&erosqnative_lcd_cmd_enable_v1[0]);
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# endif
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#else
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if (device_data.hw_rev >= 3)
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{
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lcd_exec_commands(&erosqnative_lcd_cmd_enable_v3[0]);
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}
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else
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{
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lcd_exec_commands(&erosqnative_lcd_cmd_enable_v1[0]);
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}
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#endif
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} else {
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/* doesn't flash white if we don't do anything... */
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#if 0
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lcd_exec_commands(&erosqnative_lcd_cmd_sleep[0]);
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mdelay(115); // copied from m3k
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gpio_set_level(GPIO_LCD_PWR, 0);
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gpio_set_level(GPIO_LCD_RESET, 0);
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#endif
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}
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}
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void lcd_tgt_enable_of(bool enable)
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{
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/* silence the unused parameter warning */
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if (enable)
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{}
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lcd_exec_commands(&erosqnative_lcd_of_compat_cmd[0]);
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}
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void lcd_tgt_sleep(bool sleep)
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{
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if(sleep)
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lcd_exec_commands(&erosqnative_lcd_cmd_sleep[0]);
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else
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lcd_exec_commands(&erosqnative_lcd_cmd_wake[0]);
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}
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