Solomon Peachy b3a0187416 jz4760: Major clocking improvements for audio PLL ... * for <= 48KHz, BCLK must be 256*freq (ie bdiv = 4) * for <= 96KHz, BCLK must be 128*freq (ie bdiv = 2) * for 11/22/44/88 KHz, disable PLL1 and run off XTAL * cut PLL1 with 12/24/48/98 KHz audio from 516->86MHz * cut PLL1 with 8/16/32/64 KHz audio from 426->106.5MHz This should result in significant power savings for common 44.1KHz audio playback, and pretty good savings for everything else. As an added bonus: * enable de-emphasis filters at 32, 44.1, and 48 KHz Change-Id: Ie59067cd46c47e62abf4a32c53519efad104d6c8		2020-08-07 15:55:31 -04:00
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ingenic_jz47xx	jz4760: Major clocking improvements for audio PLL	2020-08-07 15:55:31 -04:00
mmu-mips.c	Add cleaned-up xDuoo X3 support	2018-07-28 10:56:31 -04:00
mmu-mips.h	Add cleaned-up xDuoo X3 support	2018-07-28 10:56:31 -04:00