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https://github.com/Rockbox/rockbox.git
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102 lines
3.4 KiB
C
102 lines
3.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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* Copyright (C) 2025 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __CPU_STM32H743_H__
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#define __CPU_STM32H743_H__
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#include "config.h"
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#define CACHE_SIZE (16 * 1024)
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#define CACHEALIGN_BITS 5
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#define CACHEALIGN_SIZE 32
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#define DCACHE_SIZE CACHE_SIZE
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#define DCACHE_WAYS 0x4
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#define DCACHE_SETS 0x80
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#define DCACHE_LINESIZE (1 << CACHEALIGN_BITS)
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#define STM32_LSI_FREQ 32000
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#define STM32_HSI_FREQ 64000000
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#define STM32_CSI_FREQ 4000000
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#define STM32_HSI48_FREQ 48000000
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#if defined(HAVE_USBSTACK)
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# if !defined(STM32H743_USBOTG_INSTANCE)
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# error "STM32H743_USBOTG_INSTANCE is undefined!"
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# endif
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# if !defined(STM32H743_USBOTG_PHY)
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# error "STM32H743_USBOTG_PHY is undefined!"
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# endif
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# if !defined(STM32H743_USBOTG_CLKSEL)
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# error "STM32H743_USBOTG_CLKSEL is undefined!"
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# endif
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# if (STM32H743_USBOTG_INSTANCE == STM32H743_USBOTG_INSTANCE_USB1)
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# define OTGBASE 0x40040000
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# elif (STM32H743_USBOTG_INSTANCE == STM32H743_USBOTG_INSTANCE_USB2)
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# define OTGBASE 0x40080000
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# endif
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# if (STM32H743_USBOTG_PHY == STM32H743_USBOTG_PHY_ULPI_FS)
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# define USB_DW_DCFG_SPEED 1
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# elif (STM32H743_USBOTG_PHY == STM32H743_USBOTG_PHY_INT_FS)
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# define USB_DW_DCFG_SPEED 3
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# endif
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# define USB_DW_TURNAROUND 5
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/*
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* The hardware supports up to 9 endpoints, but since FIFO RAM
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* is limited, we can't support more than 5 IN EPs with a max
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* packet size of 512 bytes (usb-designware allocates the same
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* amount of RAM to each IN endpoint).
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*/
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# define USB_NUM_ENDPOINTS 6
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#endif
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#define STM32_ITCM_BASE 0x00000000
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#define STM32_ITCM_SIZE (64 * 1024)
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#define STM32_DTCM_BASE 0x20000000
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#define STM32_DTCM_SIZE (128 * 1024)
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#define STM32_SRAM_AXI_BASE 0x24000000
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#define STM32_SRAM_AXI_SIZE (512 * 1024)
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#define STM32_SRAM1_BASE 0x30000000
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#define STM32_SRAM1_SIZE (128 * 1024)
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#define STM32_SRAM2_BASE 0x30020000
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#define STM32_SRAM2_SIZE (128 * 1024)
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#define STM32_SRAM3_BASE 0x30040000
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#define STM32_SRAM3_SIZE (32 * 1024)
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#define STM32_SRAM4_BASE 0x38000000
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#define STM32_SRAM4_SIZE (64 * 1024)
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#define STM32_SRAM_BKP_BASE 0x38800000
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#define STM32_SRAM_BKP_SIZE (4 * 1024)
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#define STM32_FLASH_BANK1_BASE 0x08000000
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#define STM32_FLASH_BANK1_SIZE (1024 * 1024)
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#define STM32_FLASH_BANK2_BASE 0x08100000
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#define STM32_FLASH_BANK2_SIZE (1024 * 1024)
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/* FIXME: this changes depending on target settings */
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#define STM32_SDRAM1_BASE 0x70000000
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#endif /* __CPU_STM32H743_H__ */
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