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The Echo R1 is a new open-hardware music player design, based on the STM32H743 microcontroller. Schematics and hardware documentation for it can be found here: - https://github.com/amachronic/echoplayer This is an incomplete port. The bootloader can be loaded using OpenOCD and it can draw to the LCD using SPI. SDRAM is working but hasn't been extensively tested. Change-Id: Ifd2bee15c49868fbc989683d3ca14dce48bf3e18
256 lines
7.3 KiB
C
256 lines
7.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2025 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __GPIO_STM32_H__
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#define __GPIO_STM32_H__
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#include "system.h"
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#include "gpio-target.h"
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#include "stm32h7/gpio.h"
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#include <stddef.h>
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#include <stdint.h>
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/* GPIO port numbers */
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#define GPIO_A 0
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#define GPIO_B 1
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#define GPIO_C 2
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#define GPIO_D 3
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#define GPIO_E 4
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#define GPIO_F 5
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#define GPIO_G 6
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#define GPIO_H 7
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#define GPIO_I 8
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#define GPIO_J 9
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#define GPIO_K 10
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/* GPIO pin numbers */
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#define GPION_CREATE(port, pin) ((((port) & 0xf) << 4) | ((pin) & 0xf))
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#define GPION_PORT(gpio) (((gpio) >> 4) & 0xf)
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#define GPION_PIN(gpio) ((gpio) & 0xf)
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/* Easy pin number macros */
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#define GPIO_PA(x) GPION_CREATE(GPIO_A, x)
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#define GPIO_PB(x) GPION_CREATE(GPIO_B, x)
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#define GPIO_PC(x) GPION_CREATE(GPIO_C, x)
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#define GPIO_PD(x) GPION_CREATE(GPIO_D, x)
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#define GPIO_PE(x) GPION_CREATE(GPIO_E, x)
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#define GPIO_PF(x) GPION_CREATE(GPIO_F, x)
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#define GPIO_PG(x) GPION_CREATE(GPIO_G, x)
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#define GPIO_PH(x) GPION_CREATE(GPIO_H, x)
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#define GPIO_PI(x) GPION_CREATE(GPIO_I, x)
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#define GPIO_PJ(x) GPION_CREATE(GPIO_J, x)
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#define GPIO_PK(x) GPION_CREATE(GPIO_K, x)
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/* GPIO modes */
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#define GPIO_MODE_INPUT 0
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#define GPIO_MODE_OUTPUT 1
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#define GPIO_MODE_FUNCTION 2
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#define GPIO_MODE_ANALOG 3
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/* GPIO output types */
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#define GPIO_TYPE_PUSH_PULL 0
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#define GPIO_TYPE_OPEN_DRAIN 1
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/* GPIO output speeds */
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#define GPIO_SPEED_LOW 0
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#define GPIO_SPEED_MEDIUM 1
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#define GPIO_SPEED_HIGH 2
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#define GPIO_SPEED_VERYHIGH 3
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/* GPIO pullup settings */
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#define GPIO_PULL_DISABLED 0
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#define GPIO_PULL_UP 1
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#define GPIO_PULL_DOWN 2
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/* Helpers for GPIO library functions */
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#define GPIO_SETTING_MASK(n) (0x3u << GPIO_SETTING_LSB(n))
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#define GPIO_SETTING_LSB(n) ((n)*2)
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#define GPIO_AF_MASK(n) (0xFu << GPIO_AF_LSB(n))
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#define GPIO_AF_LSB(n) ((n)*4)
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/* GPIO function attributes */
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#define GPIO_F_MODE(n) (((n) & 0x3) << 0)
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#define GPIO_F_TYPE(n) (((n) & 0x1) << 2)
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#define GPIO_F_SPEED(n) (((n) & 0x3) << 3)
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#define GPIO_F_PULL(n) (((n) & 0x3) << 5)
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#define GPIO_F_AFNUM(n) (((n) & 0xf) << 7)
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#define GPIO_F_INITLEVEL(n) (((n) & 0x1) << 11)
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#define GPIO_F_GETMODE(x) (((x) >> 0) & 0x3)
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#define GPIO_F_GETTYPE(x) (((x) >> 2) & 0x1)
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#define GPIO_F_GETSPEED(x) (((x) >> 3) & 0x3)
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#define GPIO_F_GETPULL(x) (((x) >> 5) & 0x3)
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#define GPIO_F_GETAFNUM(x) (((x) >> 7) & 0xf)
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#define GPIO_F_GETINITLEVEL(x) (((x) >> 11) & 0x1)
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#define GPIOF_ANALOG() \
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(GPIO_F_MODE(GPIO_MODE_ANALOG) | \
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GPIO_F_TYPE(GPIO_TYPE_PUSH_PULL) | \
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GPIO_F_SPEED(GPIO_SPEED_LOW) | \
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GPIO_F_PULL(GPIO_PULL_DISABLED))
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#define GPIOF_INPUT(pull) \
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(GPIO_F_MODE(GPIO_MODE_INPUT) | \
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GPIO_F_PULL(pull))
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#define GPIOF_OUTPUT(initlevel, type, speed, pull) \
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(GPIO_F_MODE(GPIO_MODE_OUTPUT) | \
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GPIO_F_INITLEVEL(initlevel) | \
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GPIO_F_TYPE(type) | \
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GPIO_F_SPEED(speed) | \
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GPIO_F_PULL(pull))
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#define GPIOF_FUNCTION(afnum, type, speed, pull) \
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(GPIO_F_MODE(GPIO_MODE_FUNCTION) | \
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GPIO_F_AFNUM(afnum) | \
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GPIO_F_TYPE(type) | \
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GPIO_F_SPEED(speed) | \
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GPIO_F_PULL(pull))
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struct gpio_setting
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{
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uint16_t gpio;
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uint16_t func;
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};
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struct pingroup_setting
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{
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int port;
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uint16_t pins;
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uint16_t func;
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};
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#define STM_DEFGPIO(_gpio, _func) \
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{.gpio = (_gpio), .func = (_func)}
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#define STM_DEFPINS(_port, _pins, _func) \
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{.port = (_port), .pins = (_pins), .func = (_func)}
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/*
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* Configure a single GPIO or multiple GPIOs on one port.
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* 'confbits' describe the configuration to apply: see GPIO_F macros above.
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*/
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void gpio_configure_single(int gpio, int confbits);
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void gpio_configure_port(int port, uint16_t mask, int confbits);
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/*
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* Configure multiple GPIO ports according to a list of settings.
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*
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* Identical to calling gpio_configure_single() with each GPIO setting
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* and gpio_configure_port() with each pingroup setting. It is mainly
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* to make the organization of the initial GPIO configuration tidier
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* and intended to be called from gpio_init().
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*/
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void gpio_configure_all(
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const struct gpio_setting *gpios, size_t ngpios,
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const struct pingroup_setting *pingroups, size_t ngroups) INIT_ATTR;
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static inline void gpio_set_mode(int gpio, int mode)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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uint32_t val = REG_GPIO_MODER(port);
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uint32_t mask = GPIO_SETTING_MASK(pin);
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val &= ~mask;
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val |= (mode << GPIO_SETTING_LSB(pin)) & mask;
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REG_GPIO_MODER(port) = val;
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}
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static inline void gpio_set_type(int gpio, int type)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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uint32_t val = REG_GPIO_OTYPER(port);
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uint32_t mask = BIT_N(pin);
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val &= ~mask;
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val |= (type << pin) & mask;
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REG_GPIO_OTYPER(port) = val;
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}
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static inline void gpio_set_speed(int gpio, int speed)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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uint32_t val = REG_GPIO_OSPEEDR(port);
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uint32_t mask = GPIO_SETTING_MASK(pin);
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val &= ~mask;
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val |= (speed << GPIO_SETTING_LSB(pin)) & mask;
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REG_GPIO_OSPEEDR(port) = val;
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}
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static inline void gpio_set_pull(int gpio, int pull)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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uint32_t val = REG_GPIO_PUPDR(port);
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uint32_t mask = GPIO_SETTING_MASK(pin);
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val &= ~mask;
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val |= (pull << GPIO_SETTING_LSB(pin)) & mask;
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REG_GPIO_PUPDR(port) = val;
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}
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static inline void gpio_set_function(int gpio, int func)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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volatile uint32_t *addr = ®_GPIO_AFRL(port);
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if (pin >= 8) {
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addr += ®_GPIO_AFRH(0) - ®_GPIO_AFRL(0);
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pin -= 8;
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}
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uint32_t val = *addr;
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uint32_t mask = GPIO_AF_MASK(pin);
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val &= ~mask;
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val |= (func << GPIO_AF_LSB(pin)) & mask;
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*addr = val;
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}
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static inline int gpio_get_level(int gpio)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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return REG_GPIO_IDR(port) & BIT_N(pin);
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}
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static inline void gpio_set_level(int gpio, int value)
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{
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int port = GPION_PORT(gpio);
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int pin = GPION_PIN(gpio);
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if (value)
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REG_GPIO_BSRR(port) = BIT_N(pin);
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else
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REG_GPIO_BSRR(port) = BIT_N(pin + 16);
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}
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#endif /* __GPIO_STM32_H__ */
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