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Fills in the stubs the Nano 3G port was left with, taking each from how the original firmware drives the same hardware. Testing evidence: firmware/target/arm/s5l8702/ipodnano3g/TESTING.md. Co-authored-by: Claude Opus 5 <noreply@anthropic.com> Change-Id: Iea5314769502f5941a176600869591756c5e3233
65 lines
2.2 KiB
C
65 lines
2.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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* iPod Nano 3G code for the Wolfson codec (WM1870)
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*
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* Copyright (c) 2010 Michael Sparmann
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* Copyright (C) 2026 by Andrew Rice
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "audiohw.h"
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#include "i2c-s5l8702.h"
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#include "wmcodec.h"
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/* The PCM driver sets the codec up (audiohw_preinit()) and controls its
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* MCLK */
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void audiohw_init(void)
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{
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}
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/* The codec runs from a 12 MHz MCLK here, so its rate codes are the USB
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* mode ones, with a BCLK divider, as the original firmware sets them. */
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unsigned short wmcodec_sampctrl(unsigned long rate)
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{
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static const struct
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{
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unsigned long rate;
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unsigned short sampctrl;
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} rates[] =
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{
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{ SAMPR_8, 0x10d }, { SAMPR_11, 0x133 }, { SAMPR_12, 0x111 },
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{ SAMPR_16, 0x115 }, { SAMPR_22, 0x137 }, { SAMPR_24, 0x139 },
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{ SAMPR_32, 0x119 }, { SAMPR_44, 0x123 }, { SAMPR_48, 0x081 },
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{ SAMPR_88, 0x0bf }, { SAMPR_96, 0x09d },
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};
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unsigned int i;
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for (i = 0; i < ARRAYLEN(rates); i++)
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if (rates[i].rate == rate)
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return rates[i].sampctrl;
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return 0;
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}
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/* 7-bit register and 9-bit value, as two bytes to address 0x34 on I2C
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* bus 0. The codec does not acknowledge reads. */
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void wmcodec_write(int reg, int data)
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{
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unsigned char d = data & 0xff;
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i2c_write(0, 0x34, (reg << 1) | ((data >> 8) & 1), 1, &d);
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}
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