mirror of
https://github.com/Rockbox/rockbox.git
synced 2026-04-11 16:37:45 -04:00
58b186d6de
They haven't seen development activity for the better part of two decades and apparently were never able to even boot to Rockbox, although the Rockbox bootloader could load the original firmware. Change-Id: I5cfa5909c21feaf2825aa685a05e78044b893a13
353 lines
11 KiB
ArmAsm
353 lines
11 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Jens Arnold
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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.syntax unified
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#if CONFIG_CPU == PP5002
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/* Causes ATA retries on iPod G3 probably related to improper controller
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* setup. Needs investigation. */
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.section .icode,"ax",%progbits
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.equ .ata_port, 0xc00031e0
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#elif defined CPU_PP502x
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/* Verified working on (PP5020, PP5022) targets */
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.section .icode,"ax",%progbits
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.equ .ata_port, 0xc30001e0
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#elif CONFIG_CPU == S3C2440
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/* Untested */
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.text
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.equ .ata_port, 0x18000000
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#elif defined(MROBE_500)
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.text
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.equ .ata_port, 0x50400000
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#else
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/* This isn't vaild, but it does it's job, not sure what this should be */
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#error ata_port undefined!
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#endif
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.align 2
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.global copy_read_sectors
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.type copy_read_sectors,%function
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/* Read a number of words from the ATA data port
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*
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* Optimised for speed; assumes wordcount >= 10
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*
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* Arguments:
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* r0 - buffer address
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* r1 - word count
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*
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* Register usage:
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* r0 - current address
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* r1 - word count
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* r2 - ata port
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* r3..r5, r12, lr - read buffers
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*/
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copy_read_sectors:
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stmfd sp!, {r4, r5, lr}
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ldr r2, =.ata_port
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tst r0, #1 /* 16 bit aligned? */
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beq .r_aligned
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/* not 16-bit aligned */
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sub r1, r1, #1 /* one halfword is handled unconditionally */
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ldrh r3, [r2] /* read first halfword */
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strb r3, [r0], #1 /* store low byte */
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mov r3, r3, lsr #8
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tst r0, #2 /* 32 bit aligned? */
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beq .r_noword_u
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ldrh r4, [r2] /* read second halfword */
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orr r3, r3, r4, lsl #8 /* combine with old byte */
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strh r3, [r0], #2 /* store */
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mov r3, r4, lsr #8
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sub r1, r1, #1 /* another halfword taken */
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.r_noword_u:
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sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
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.r_loop_u:
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ldrh r4, [r2] /* Read 8 halfwords and combine them into */
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orr r3, r3, r4, lsl #8 /* 4 words so that they're properly aligned */
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ldrh r4, [r2] /* in memory. Bottom byte of first word is */
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orr r3, r3, r4, lsl #24 /* the top byte from the last round. Write */
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mov r4, r4, lsr #8 /* all 4 words at once. */
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #8
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #24
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mov r5, r5, lsr #8
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ldrh r12, [r2]
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orr r5, r5, r12, lsl #8
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ldrh r12, [r2]
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orr r5, r5, r12, lsl #24
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mov r12, r12, lsr #8
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ldrh lr, [r2]
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orr r12, r12, lr, lsl #8
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ldrh lr, [r2]
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orr r12, r12, lr, lsl #24
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stmia r0!, {r3, r4, r5, r12}
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mov r3, lr, lsr #8
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subs r1, r1, #8 /* 8 or more halfwords left? */
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bge .r_loop_u
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/* No need to adjust the count, only checking bits from now on. */
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tst r1, #4 /* 4 or more halfwords left? */
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beq .r_end4_u
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ldrh r4, [r2]
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orr r3, r3, r4, lsl #8
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ldrh r4, [r2]
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orr r3, r3, r4, lsl #24
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mov r4, r4, lsr #8
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #8
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #24
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stmia r0!, {r3, r4}
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mov r3, r5, lsr #8
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.r_end4_u:
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tst r1, #2 /* 2 or more halfwords left? */
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beq .r_end2_u
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ldrh r4, [r2]
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orr r3, r3, r4, lsl #8
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ldrh r4, [r2]
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orr r3, r3, r4, lsl #24
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str r3, [r0], #4
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mov r3, r4, lsr #8
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.r_end2_u:
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tst r1, #1 /* one halfword left? */
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ldrhne r4, [r2]
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orrne r3, r3, r4, lsl #8
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strhne r3, [r0], #2
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movne r3, r4, lsr #8
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strb r3, [r0], #1 /* store final byte */
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ldmpc regs=r4-r5
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/* 16-bit aligned */
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.r_aligned:
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tst r0, #2 /* 32 bit aligned? */
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ldrhne r3, [r2] /* no: read first halfword */
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strhne r3, [r0], #2 /* store */
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subne r1, r1, #1 /* one halfword taken */
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sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
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.r_loop_a:
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ldrh r3, [r2] /* Read 8 halfwords and combine each pair */
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ldrh r4, [r2] /* into a word, then store all at once. */
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orr r3, r3, r4, lsl #16
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ldrh r4, [r2]
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #16
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ldrh r5, [r2]
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ldrh r12, [r2]
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orr r5, r5, r12, lsl #16
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ldrh r12, [r2]
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ldrh lr, [r2]
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orr r12, r12, lr, lsl #16
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stmia r0!, {r3, r4, r5, r12}
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subs r1, r1, #8 /* 8 or more halfwords left? */
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bge .r_loop_a
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/* No need to adjust the count, only checking bits from now on. */
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tst r1, #4 /* 4 or more halfwords left? */
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beq .r_end4_a
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ldrh r3, [r2]
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ldrh r4, [r2]
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orr r3, r3, r4, lsl #16
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ldrh r4, [r2]
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ldrh r5, [r2]
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orr r4, r4, r5, lsl #16
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stmia r0!, {r3, r4}
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.r_end4_a:
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tst r1, #2 /* 2 or more halfwords left? */
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ldrhne r3, [r2]
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ldrhne r4, [r2]
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orrne r3, r3, r4, lsl #16
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strne r3, [r0], #4
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tst r1, #1 /* one halfword left? */
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ldrhne r3, [r2]
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strhne r3, [r0], #2
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ldmpc regs=r4-r5
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.r_end:
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.size copy_read_sectors,.r_end-copy_read_sectors
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.align 2
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.global copy_write_sectors
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.type copy_write_sectors,%function
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/* Write a number of words to the ATA data port
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*
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* Optimised for speed; assumes wordcount >= 10
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*
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* Arguments:
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* r0 - buffer address
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* r1 - word count
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*
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* Register usage:
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* r0 - current address
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* r1 - word count
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* r2 - ata port
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* r3..r5, r12, lr - read buffers
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*/
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copy_write_sectors:
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stmfd sp!, {r4, r5, lr}
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ldr r2, =.ata_port
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tst r0, #1 /* 16 bit aligned? */
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beq .w_aligned
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/* not 16-bit aligned */
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sub r1, r1, #1 /* one halfword is done unconditionally */
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ldrb r3, [r0], #1 /* load 1st byte, now halfword aligned. */
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tst r0, #2 /* 32 bit aligned? */
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beq .w_noword_u
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ldrh r4, [r0], #2 /* load a halfword */
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orr r3, r3, r4, lsl #8 /* combine with old byte */
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strh r3, [r2] /* write halfword */
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mov r3, r4, lsr #8
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sub r1, r1, #1 /* another halfword taken */
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.w_noword_u:
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sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
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.w_loop_u:
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ldmia r0!, {r4, r5, r12, lr}
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orr r3, r3, r4, lsl #8 /* Load 4 words at once and decompose them */
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strh r3, [r2] /* into 8 halfwords in a way that the words */
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mov r3, r3, lsr #16 /* are shifted by 8 bits, putting the high */
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strh r3, [r2] /* byte of one word into the low byte of */
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mov r4, r4, lsr #24 /* the next. High byte of last word becomes */
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orr r4, r4, r5, lsl #8 /* low byte of next round. */
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strh r4, [r2]
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mov r4, r4, lsr #16
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strh r4, [r2]
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mov r5, r5, lsr #24
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orr r5, r5, r12, lsl #8
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strh r5, [r2]
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mov r5, r5, lsr #16
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strh r5, [r2]
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mov r12, r12, lsr #24
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orr r12, r12, lr, lsl #8
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strh r12, [r2]
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mov r12, r12, lsr #16
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strh r12, [r2]
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mov r3, lr, lsr #24
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subs r1, r1, #8 /* 8 or more halfwords left? */
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bge .w_loop_u
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/* No need to adjust the count, only checking bits from now on. */
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tst r1, #4 /* 4 or more halfwords left? */
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beq .w_end4_u
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ldmia r0!, {r4, r5}
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orr r3, r3, r4, lsl #8
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strh r3, [r2]
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mov r3, r3, lsr #16
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strh r3, [r2]
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mov r4, r4, lsr #24
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orr r4, r4, r5, lsl #8
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strh r4, [r2]
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mov r4, r4, lsr #16
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strh r4, [r2]
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mov r3, r5, lsr #24
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.w_end4_u:
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tst r1, #2 /* 2 or more halfwords left? */
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beq .w_end2_u
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ldr r4, [r0], #4
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orr r3, r3, r4, lsl #8
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strh r3, [r2]
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mov r3, r3, lsr #16
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strh r3, [r2]
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mov r3, r4, lsr #24
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.w_end2_u:
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tst r1, #1 /* one halfword left? */
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ldrhne r4, [r0], #2
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orrne r3, r3, r4, lsl #8
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strhne r3, [r2]
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movne r3, r3, lsr #16
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ldrb r4, [r0], #1 /* load final byte */
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orr r3, r3, r4, lsl #8
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strh r3, [r2] /* write final halfword */
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ldmpc regs=r4-r5
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/* 16-bit aligned */
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.w_aligned:
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tst r0, #2 /* 32 bit aligned? */
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ldrhne r3, [r0], #2 /* no: load first halfword */
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strhne r3, [r2] /* write */
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subne r1, r1, #1 /* one halfword taken */
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sub r1, r1, #8 /* adjust for zero-check and doing 8 halfwords/loop */
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.w_loop_a:
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ldmia r0!, {r3, r4, r5, r12}
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strh r3, [r2] /* Load 4 words and decompose them into */
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mov r3, r3, lsr #16 /* 2 halfwords each, and write those. */
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strh r3, [r2]
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strh r4, [r2]
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mov r4, r4, lsr #16
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strh r4, [r2]
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strh r5, [r2]
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mov r5, r5, lsr #16
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strh r5, [r2]
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strh r12, [r2]
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mov r12, r12, lsr #16
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strh r12, [r2]
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subs r1, r1, #8 /* 8 or more halfwords left? */
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bge .w_loop_a
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/* No need to adjust the count, only checking bits from now on. */
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tst r1, #4 /* 4 or more halfwords left? */
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beq .w_end4_a
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ldmia r0!, {r3, r4}
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strh r3, [r2]
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mov r3, r3, lsr #16
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strh r3, [r2]
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strh r4, [r2]
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mov r4, r4, lsr #16
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strh r4, [r2]
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.w_end4_a:
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tst r1, #2 /* 2 or more halfwords left? */
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ldrne r3, [r0], #4
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strhne r3, [r2]
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movne r3, r3, lsr #16
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strhne r3, [r2]
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tst r1, #1 /* one halfword left? */
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ldrhne r3, [r0], #2
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strhne r3, [r2]
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ldmpc regs=r4-r5
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.w_end:
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.size copy_write_sectors,.w_end-copy_write_sectors
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