mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-11-09 13:12:37 -05:00
Many SPI NAND flash chips have on-die ECC engines that report ECC status via the status feature register. This code handles the common case where ECC status is reported with 2 bits: one bit to indicate if flips were detected & corrected, and another bit to indicate an uncorrectable error. Change-Id: I5d587cd960ca9d090d2629e890724a6bc411e70c |
||
|---|---|---|
| .. | ||
| arm | ||
| coldfire | ||
| hosted | ||
| mips | ||