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361913fdd2
The WM8750 frames its ADC on ADCLRC and its DAC on DACLRC. As the I2S slave both are inputs, and the rk27xx has a single LRCK, which on the YP-CP3 evidently does not reach ADCLRC: with the rk27xx as the master, the recording DMA got exact zeros on most visits to the recording screen and real samples only by chance, sometimes changing partway through a visit. That stays so with the codec PLL no longer glitching the I2S clocks (previous commit); with the codec as the master it does not happen. The codec now drives BCLK and both LRCKs itself, and the rk27xx I2S transmitter and receiver are slaves. The codec's MCLK still comes from the rk27xx codec PLL at 256 fs, so sample rates stay exact. The original firmware runs the codec as master too, but off a fixed 12 MHz in USB mode. RK27XX_I2S_MCLK says the rk27xx makes the codec's MCLK, apart from CODEC_SLAVE, which also makes it the I2S master. The YP-CP3 drops CODEC_SLAVE for RK27XX_I2S_MCLK, and the WM8750 driver sets its master bit as it does for any codec that is not a slave. Tested on a YP-CP3: playback, FM radio, the recording screen's peak meter on every visit, recording from the microphone and from FM. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Change-Id: I0dc93d3b2c45fddf61649702a931d11806e78cbf
189 lines
5.8 KiB
C
189 lines
5.8 KiB
C
/*
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* This config file is for the Samsung YP-CP3 (rk27xx)
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*/
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/* For Rolo and boot loader */
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#define MODEL_NUMBER 132
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#define MODEL_NAME "Samsung YP-CP3"
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/* define this if you have recording possibility */
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#define HAVE_RECORDING
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/* define the bitmask of hardware sample rates */
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#define HW_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
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| SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
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| SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
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/* define the bitmask of recording sample rates */
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#define REC_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
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| SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
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| SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
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/* define this if you have a colour LCD */
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#define HAVE_LCD_COLOR
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/* define this if you want album art for this target */
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#define HAVE_ALBUMART
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/* define this to enable bitmap scaling */
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#define HAVE_BMP_SCALING
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/* define this to enable JPEG decoding */
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#define HAVE_JPEG
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/* define this if you have access to the quickscreen */
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#define HAVE_QUICKSCREEN
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/* define this if you would like tagcache to build on this target */
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#define HAVE_TAGCACHE
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/* define this if you have a flash memory storage */
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#define HAVE_FLASH_STORAGE
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#define CONFIG_STORAGE (STORAGE_SD | STORAGE_NAND)
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#define CONFIG_NAND NAND_RK27XX
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#define CONFIG_RK27XX_FTL RK27XX_FTL_SCHEME_A
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/* commented for now */
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/* #define HAVE_HOTSWAP */
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/* The NAND holds two volumes, SYS and USER; SYS is hidden - see
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* config/rk27generic.h for why and for what HAVE_RK27XX_NAND_SYS does.
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* storage.c numbers drives by driver, SD first:
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*
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* default HAVE_RK27XX_NAND_SYS
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* drive 0 SD SD
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* drive 1 NAND USER NAND SYS
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* drive 2 NAND USER
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*/
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/* #define HAVE_RK27XX_NAND_SYS */
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#ifdef HAVE_RK27XX_NAND_SYS
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#define NUM_DRIVES 3
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#else
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#define NUM_DRIVES 2
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#endif
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#define SECTOR_SIZE 512
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/* for small(ish) SD cards */
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#define HAVE_FAT16SUPPORT
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/* LCD dimensions */
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#define LCD_WIDTH 400
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#define LCD_HEIGHT 240
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/* sqrt(400^2 + 240^2) / 3.0 = 155.5 */
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#define LCD_DPI 155
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#define LCD_DEPTH 16 /* pseudo 262.144 colors */
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#define LCD_PIXELFORMAT RGB565 /* rgb565 */
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/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE
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should be defined as well. */
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#ifndef BOOTLOADER
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/* TODO: #define HAVE_LCD_SLEEP */
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/* TODO: #define HAVE_LCD_SLEEP_SETTING */
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#endif
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/* the YP-R0's key set - see ypcp3/button-target.h */
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#define CONFIG_KEYPAD SAMSUNG_YPR0_PAD
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/* Define this to enable morse code input */
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#define HAVE_MORSE_INPUT
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#define CONFIG_LCD LCD_SPFD5420A
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/* Wolfson WM8750 on I2C, headphones on its OUT2. The codec is the I2S
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* master, driving BCLK and both of its LRCKs: as a slave it frames the ADC
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* on its ADCLRC input, which the rk27xx's one LRCK does not reach, and
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* records zeros. Its MCLK comes from the rk27xx's codec PLL at 256 fs for
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* every rate (pcm-rk27xx.c), so the codec's CLOCKING register is its
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* normal-mode 256 fs setting throughout. The original firmware runs the
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* codec as master off a fixed 12 MHz instead, in USB mode, which puts
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* 44.1 kHz at 44.118. */
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#define HAVE_WM8750
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#define RK27XX_I2S_MCLK
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#define CODEC_SRCTRL_11025HZ 0
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#define CODEC_SRCTRL_22050HZ 0
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#define CODEC_SRCTRL_44100HZ 0
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/* Seiko S-35390A real-time clock on I2C, left in 12-hour mode by the
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* original firmware */
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#define CONFIG_RTC RTC_S35390A
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/* Silicon Labs Si4703 FM tuner on I2C, with RDS. It has no power control -
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* the original firmware has none either - and its audio reaches the codec
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* on LINPUT1/RINPUT1. RDS is polled, which needs no interrupt line. */
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#define CONFIG_TUNER SI4700
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#define HAVE_RDS_CAP
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#define CONFIG_RDS (RDS_CFG_POLL | RDS_CFG_PROCESS)
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#define CONFIG_RDS_POLL_TICKS 4
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/* inputs: the microphone (mono, on RINPUT2) and the tuner */
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#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_FMRADIO)
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/* Define this for LCD backlight available */
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#define HAVE_BACKLIGHT
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#define HAVE_BACKLIGHT_BRIGHTNESS
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#define MIN_BRIGHTNESS_SETTING 0
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#define MAX_BRIGHTNESS_SETTING 31
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#define DEFAULT_BRIGHTNESS_SETTING 20
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#define CONFIG_BACKLIGHT_FADING BACKLIGHT_FADING_SW_HW_REG
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/* Define this if you have a software controlled poweroff */
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#define HAVE_SW_POWEROFF
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/* The number of bytes reserved for loadable codecs */
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#define CODEC_SIZE 0x100000
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/* The number of bytes reserved for loadable plugins */
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#define PLUGIN_BUFFER_SIZE 0x80000
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/* TODO: Figure out real values */
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#define BATTERY_CAPACITY_DEFAULT 400 /* default battery capacity */
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#define BATTERY_CAPACITY_MIN 300 /* min. capacity selectable */
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#define BATTERY_CAPACITY_MAX 500 /* max. capacity selectable */
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#define BATTERY_CAPACITY_INC 10 /* capacity increment */
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#define CONFIG_BATTERY_MEASURE VOLTAGE_MEASURE
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/* Hardware controlled charging with monitoring */
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#define CONFIG_CHARGING CHARGING_MONITOR
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/* define this if the unit can be powered or charged via USB */
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#define HAVE_USB_POWER
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/* USB On-the-go */
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#define CONFIG_USBOTG USBOTG_RK27XX
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/* enable these for the experimental usb stack */
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#define HAVE_USBSTACK
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#define USB_VENDOR_ID 0x071b
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#define USB_PRODUCT_ID 0x3202
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#define HAVE_BOOTLOADER_USB_MODE
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/* The exact type of CPU */
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#define CONFIG_CPU RK27XX
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/* I2C interface */
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#define CONFIG_I2C I2C_RK27XX
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/* Define this to the CPU frequency */
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#define CPU_FREQ 200000000
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/* Offset ( in the firmware file's header ) to the file CRC */
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#define FIRMWARE_OFFSET_FILE_CRC 0
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/* Offset ( in the firmware file's header ) to the real data */
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#define FIRMWARE_OFFSET_FILE_DATA 8
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/* Define this if you have adjustable CPU frequency */
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#define HAVE_ADJUSTABLE_CPU_FREQ
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/* Virtual LED (icon) */
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#define CONFIG_LED LED_VIRTUAL
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#define RKW_FORMAT
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#define BOOTFILE_EXT "rkw"
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#define BOOTFILE "rockbox." BOOTFILE_EXT
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#define BOOTDIR "/.rockbox"
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