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eea0c128f4
With only one target, it doesn't make sense to have a common system_init() yet. Change-Id: I0f6d37709d60bb309fb16ecb9b0870297a189cc4
46 lines
1.7 KiB
C
46 lines
1.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2025 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __STM32_SYSTEM_TARGET_H__
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#define __STM32_SYSTEM_TARGET_H__
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#include "system-arm.h"
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#include "cpucache-armv7m.h"
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#include <stdbool.h>
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/* Enable CPU caches. Must be called after a reset. */
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void stm32_enable_caches(void) INIT_ATTR;
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/* Enables the SysTick timer -- SysTick interrupt won't be enabled */
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void stm32_systick_enable(void);
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/* Disables the SysTick timer -- also disables SysTick interrupt */
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void stm32_systick_disable(void);
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/* Update the CPU frequency to recalibrate SysTick timer */
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void stm32_systick_set_cpu_freq(uint32_t freq);
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/* Enable/disable debug clock domain during sleep mode. */
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void system_debug_enable(bool enable);
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/* Busy loop delay based on systick */
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void udelay(uint32_t us);
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#endif /* __STM32_SYSTEM_TARGET_H__ */
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