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721bfac475
Normally the bootloader won't enable the LCD, but we still want to call lcd_init() at startup to keep the code simple. Change-Id: I866ecd7c81b6c5e6acdd57f5d7680400df3f54f4
278 lines
7.3 KiB
C
278 lines
7.3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2025 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "kernel.h"
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#include "lcd.h"
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#include "lcd-echoplayer.h"
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#include "clock-echoplayer.h"
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#include "nvic-arm.h"
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#include "spi-stm32h7.h"
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#include "gpio-stm32h7.h"
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#include "clock-stm32h7.h"
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#include "regs/stm32h743/rcc.h"
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#include "regs/stm32h743/spi.h"
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#include "regs/stm32h743/ltdc.h"
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#define MS_TO_TICKS(x) \
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(((x) + (1000 / HZ - 1)) / (1000 / HZ))
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/*
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* ILI9342C specifies 10 MHz max
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*
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* Use 12MHz for now -- for some reason using 6 MHz doesn't work
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* to enable RGB mode, but works fine to send graphics in SPI mode?
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*/
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#define LCD_SPI_FREQ 12000000
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#define ili_cmd(cmd, ...) \
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do { \
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uint16_t arr[] = {cmd, __VA_ARGS__}; \
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for (size_t i = 1; i < ARRAYLEN(arr); ++i) \
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arr[i] |= 0x100; \
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stm_spi_transmit(&spi, arr, sizeof(arr)); \
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} while (0)
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struct stm_spi_config spi_cfg = {
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.instance = ITA_SPI5,
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.clock = &spi5_ker_clock,
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.freq = LCD_SPI_FREQ,
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.mode = STM_SPIMODE_HALF_DUPLEX,
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.proto = STM_SPIPROTO_MOTOROLA,
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.frame_bits = 9,
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.hw_cs_output = true,
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};
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struct stm_spi spi;
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enum lcd_controller_state
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{
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RESET, /* Controller in hardware reset, LTDC disabled */
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SLEEP, /* Controller in sleep-in mode, LTDC disabled */
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AWAKE, /* Controller in sleep-out mode, LTDC enabled */
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};
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static enum lcd_controller_state lcd_controller_state = RESET;
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static void enable_ltdc(void)
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{
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/* Enable LTDC clock */
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stm32_clock_enable(<dc_ker_clock);
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/* Set timing parameters */
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const uint32_t hsw = LCD_HSW - 1;
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const uint32_t ahbp = hsw + LCD_HBP;
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const uint32_t aaw = ahbp + LCD_HAW;
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const uint32_t totw = aaw + LCD_HFP;
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const uint32_t vsh = LCD_VSH - 1;
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const uint32_t avbp = vsh + LCD_VBP;
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const uint32_t aah = avbp + LCD_VAH;
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const uint32_t toth = aah + LCD_VFP;
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reg_writef(LTDC_SSCR, HSW(hsw), VSH(vsh));
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reg_writef(LTDC_BPCR, AHBP(ahbp), AVBP(avbp));
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reg_writef(LTDC_AWCR, AAW(aaw), AAH(aah));
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reg_writef(LTDC_TWCR, TOTALW(totw), TOTALH(toth));
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/* Set interface polarity */
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reg_writef(LTDC_GCR, HSPOL(0), VSPOL(0), DEPOL(0), PCPOL(0), DEN(0));
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/* Enable layer 1 to blit framebuffer to whole screen */
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const uint32_t row_bytes = LCD_WIDTH * FB_DATA_SZ;
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reg_assignf(LTDC_LAYER_WHPCR(0), WHSPPOS(ahbp + LCD_HAW), WHSTPOS(ahbp + 1));
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reg_assignf(LTDC_LAYER_WVPCR(0), WVSPPOS(avbp + LCD_VAH), WVSTPOS(avbp + 1));
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reg_assignf(LTDC_LAYER_PFCR(0), PF(BV_LTDC_LAYER_PFCR_PF_RGB565));
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reg_var(LTDC_LAYER_CFBAR(0)) = (uintptr_t)FBADDR(0, 0);
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reg_assignf(LTDC_LAYER_CFBLR(0), CFBP(row_bytes), CFBLL(row_bytes + 7));
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reg_assignf(LTDC_LAYER_CFBLNR(0), CFBLNBR(LCD_HEIGHT));
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reg_assignf(LTDC_LAYER_CR(0), LEN(1));
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/* Reload shadow registers to enable layer 1 */
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reg_writef(LTDC_SRCR, IMR(1));
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/* Enable LTDC output */
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reg_writef(LTDC_GCR, LTDCEN(1));
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}
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static void disable_ltdc(void)
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{
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reg_writef(LTDC_GCR, LTDCEN(0));
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stm32_clock_disable(<dc_ker_clock);
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}
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/* TODO: thread safety, is a mutex needed here? */
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static void reset_lcd(void)
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{
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if (lcd_controller_state != RESET)
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{
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if (lcd_controller_state == AWAKE)
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disable_ltdc();
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/* Must be >= 10 us to take effect */
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gpio_set_level(GPIO_LCD_RESET, 0);
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udelay(10);
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lcd_controller_state = RESET;
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}
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}
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static void sleep_lcd(void)
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{
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if (lcd_controller_state == AWAKE)
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{
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/*
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* Send sleep in command -- empirically this seems to
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* require a delay of 10ms before disabling the LTDC.
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* The clock output appears to be necessary to fully
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* blank the screen before entering sleep mode.
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*
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* Sometimes there is an effect where the screen is
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* only partly blanked and only later fully blanked,
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* which goes away with a 20ms delay.
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*/
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ili_cmd(0x10);
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sleep(MS_TO_TICKS(20));
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/* Disable LTDC */
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disable_ltdc();
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lcd_controller_state = SLEEP;
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}
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}
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static void wake_lcd(void)
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{
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if (lcd_controller_state == RESET)
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{
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/* Release reset line */
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gpio_set_level(GPIO_LCD_RESET, 1);
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sleep(MS_TO_TICKS(5));
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/* Memory access control (X/Y invert, BGR panel) */
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ili_cmd(0x36, 0xc8);
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/* Pixel format set (18bpp for RGB bus, 16bpp for SPI bus) */
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ili_cmd(0x3a, 0x65);
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/* Send set EXTC command to allow configuring RGB interface */
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ili_cmd(0xc8, 0xff, 0x93, 0x42);
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/*
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* Enable RGB interface transferring to internal GRAM.
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*
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* Direct to shift register mode doesn't work; for one, the
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* framebuffer doesn't get transferred properly which might
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* just be timing issues. Two, the display is horizontally
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* flipped and there doesn't seem to be a way to change it
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* in the shift register mode.
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*/
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ili_cmd(0xb0, 0xc0);
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ili_cmd(0xf6, 0x01, 0x00, 0x06);
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/* Display ON */
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ili_cmd(0x29);
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}
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if (lcd_controller_state != AWAKE)
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{
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/* Sync framebuffer & enable LTDC output */
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commit_dcache();
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enable_ltdc();
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/* Sleep out command */
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ili_cmd(0x11);
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sleep(MS_TO_TICKS(5));
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lcd_controller_state = AWAKE;
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send_event(LCD_EVENT_ACTIVATION, NULL);
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}
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}
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void lcd_init_device(void)
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{
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/* Configure SPI bus */
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stm_spi_init(&spi, &spi_cfg);
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nvic_enable_irq(NVIC_IRQN_SPI5);
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#ifndef BOOTLOADER
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/* Enable LTDC and LCD controller */
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wake_lcd();
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#endif
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}
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bool lcd_active(void)
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{
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return lcd_controller_state == AWAKE;
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}
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void lcd_enable(bool enable)
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{
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if (enable)
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wake_lcd();
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else
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sleep_lcd();
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}
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void lcd_shutdown(void)
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{
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reset_lcd();
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}
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void lcd_update(void)
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{
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if (!lcd_active())
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return;
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commit_dcache();
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}
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void lcd_update_rect(int x, int y, int width, int height)
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{
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if (!lcd_active())
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return;
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if (x < 0)
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x = 0;
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else if (x >= LCD_WIDTH)
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x = LCD_WIDTH - 1;
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if (y < 0)
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y = 0;
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else if (y >= LCD_HEIGHT)
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y = LCD_HEIGHT - 1;
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if (width > LCD_WIDTH - x)
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width = LCD_WIDTH - x;
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if (height > LCD_HEIGHT - y)
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height = LCD_HEIGHT - y;
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for (int dy = 0; dy < height; ++dy)
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commit_dcache_range(FBADDR(x, y+dy), FB_DATA_SZ * width);
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}
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void spi5_irq_handler(void)
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{
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stm_spi_irq_handler(&spi);
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}
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