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https://github.com/Rockbox/rockbox.git
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159 lines
6.7 KiB
C
159 lines
6.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2026 by Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __DMAMUX_STM32H743_H__
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#define __DMAMUX_STM32H743_H__
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/* DMAMUX1 request multiplexer inputs (DMAMUX_CR.DMAREQ_ID) */
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#define DMAMUX1_REQ_GEN0 1
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#define DMAMUX1_REQ_GEN1 2
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#define DMAMUX1_REQ_GEN2 3
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#define DMAMUX1_REQ_GEN3 4
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#define DMAMUX1_REQ_GEN4 5
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#define DMAMUX1_REQ_GEN5 6
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#define DMAMUX1_REQ_GEN6 7
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#define DMAMUX1_REQ_GEN7 8
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#define DMAMUX1_REQ_ADC1_DMA 9
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#define DMAMUX1_REQ_ADC2_DMA 10
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#define DMAMUX1_REQ_TIM1_CH1 11
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#define DMAMUX1_REQ_TIM1_CH2 12
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#define DMAMUX1_REQ_TIM1_CH3 13
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#define DMAMUX1_REQ_TIM1_CH4 14
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#define DMAMUX1_REQ_TIM1_UP 15
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#define DMAMUX1_REQ_TIM1_TRIG 16
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#define DMAMUX1_REQ_TIM1_COM 16
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#define DMAMUX1_REQ_TIM2_CH1 18
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#define DMAMUX1_REQ_TIM2_CH2 19
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#define DMAMUX1_REQ_TIM2_CH3 20
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#define DMAMUX1_REQ_TIM2_CH4 21
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#define DMAMUX1_REQ_TIM2_UP 22
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#define DMAMUX1_REQ_TIM3_CH1 23
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#define DMAMUX1_REQ_TIM3_CH2 24
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#define DMAMUX1_REQ_TIM3_CH3 25
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#define DMAMUX1_REQ_TIM3_CH4 26
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#define DMAMUX1_REQ_TIM3_UP 27
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#define DMAMUX1_REQ_TIM3_TRIG 28
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#define DMAMUX1_REQ_TIM4_CH1 29
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#define DMAMUX1_REQ_TIM4_CH2 30
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#define DMAMUX1_REQ_TIM4_CH3 31
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#define DMAMUX1_REQ_TIM4_UP 32
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#define DMAMUX1_REQ_I2C1_RX_DMA 33
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#define DMAMUX1_REQ_I2C1_TX_DMA 34
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#define DMAMUX1_REQ_I2C2_RX_DMA 35
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#define DMAMUX1_REQ_I2C2_TX_DMA 36
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#define DMAMUX1_REQ_SPI1_RX_DMA 37
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#define DMAMUX1_REQ_SPI1_TX_DMA 38
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#define DMAMUX1_REQ_SPI2_RX_DMA 39
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#define DMAMUX1_REQ_SPI2_TX_DMA 40
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#define DMAMUX1_REQ_USART1_RX_DMA 41
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#define DMAMUX1_REQ_USART1_TX_DMA 42
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#define DMAMUX1_REQ_USART2_RX_DMA 43
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#define DMAMUX1_REQ_USART2_TX_DMA 44
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#define DMAMUX1_REQ_USART3_RX_DMA 45
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#define DMAMUX1_REQ_USART3_TX_DMA 46
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#define DMAMUX1_REQ_TIM8_CH1 47
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#define DMAMUX1_REQ_TIM8_CH2 48
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#define DMAMUX1_REQ_TIM8_CH3 49
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#define DMAMUX1_REQ_TIM8_CH4 50
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#define DMAMUX1_REQ_TIM8_UP 51
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#define DMAMUX1_REQ_TIM8_TRIG 52
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#define DMAMUX1_REQ_TIM8_COM 53
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#define DMAMUX1_REQ_TIM5_CH1 55
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#define DMAMUX1_REQ_TIM5_CH2 56
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#define DMAMUX1_REQ_TIM5_CH3 57
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#define DMAMUX1_REQ_TIM5_CH4 58
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#define DMAMUX1_REQ_TIM5_UP 59
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#define DMAMUX1_REQ_TIM5_TRIG 60
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#define DMAMUX1_REQ_SPI3_RX_DMA 61
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#define DMAMUX1_REQ_SPI3_TX_DMA 62
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#define DMAMUX1_REQ_UART4_RX_DMA 63
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#define DMAMUX1_REQ_UART4_TX_DMA 64
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#define DMAMUX1_REQ_UART5_RX_DMA 65
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#define DMAMUX1_REQ_UART5_TX_DMA 66
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#define DMAMUX1_REQ_DAC_CH1_DMA 67
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#define DMAMUX1_REQ_DAC_CH2_DMA 68
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#define DMAMUX1_REQ_TIM6_UP 69
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#define DMAMUX1_REQ_TIM7_UP 70
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#define DMAMUX1_REQ_USART6_RX_DMA 71
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#define DMAMUX1_REQ_USART6_TX_DMA 72
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#define DMAMUX1_REQ_I2C3_RX_DMA 73
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#define DMAMUX1_REQ_I2C3_TX_DMA 74
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#define DMAMUX1_REQ_DCMI_DMA 75
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#define DMAMUX1_REQ_CRYP_IN_DMA 76
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#define DMAMUX1_REQ_CRYP_OUT_DMA 77
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#define DMAMUX1_REQ_HASH_IN_DMA 78
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#define DMAMUX1_REQ_UART7_RX_DMA 79
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#define DMAMUX1_REQ_UART7_TX_DMA 80
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#define DMAMUX1_REQ_UART8_RX_DMA 81
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#define DMAMUX1_REQ_UART8_TX_DMA 82
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#define DMAMUX1_REQ_SPI4_RX_DMA 83
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#define DMAMUX1_REQ_SPI4_TX_DMA 84
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#define DMAMUX1_REQ_SPI5_RX_DMA 85
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#define DMAMUX1_REQ_SPI5_TX_DMA 86
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#define DMAMUX1_REQ_SAI1A_DMA 87
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#define DMAMUX1_REQ_SAI1B_DMA 88
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#define DMAMUX1_REQ_SAI2A_DMA 89
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#define DMAMUX1_REQ_SAI2B_DMA 90
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#define DMAMUX1_REQ_SWPMI_RX_DMA 91
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#define DMAMUX1_REQ_SWPMI_TX_DMA 92
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#define DMAMUX1_REQ_SPDIFRX_DAT_DMA 93
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#define DMAMUX1_REQ_SPDIFRX_CTRL_DMA 94
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#define DMAMUX1_REQ_HR_REQ1 95
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#define DMAMUX1_REQ_HR_REQ2 96
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#define DMAMUX1_REQ_HR_REQ3 97
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#define DMAMUX1_REQ_HR_REQ4 98
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#define DMAMUX1_REQ_HR_REQ5 99
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#define DMAMUX1_REQ_HR_REQ6 100
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#define DMAMUX1_REQ_DFSDM1_DMA0 101
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#define DMAMUX1_REQ_DFSDM1_DMA1 102
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#define DMAMUX1_REQ_DFSDM1_DMA2 103
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#define DMAMUX1_REQ_DFSDM1_DMA3 104
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#define DMAMUX1_REQ_TIM15_CH1 105
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#define DMAMUX1_REQ_TIM15_UP 106
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#define DMAMUX1_REQ_TIM15_TRIG 107
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#define DMAMUX1_REQ_TIM15_COM 108
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#define DMAMUX1_REQ_TIM16_CH1 109
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#define DMAMUX1_REQ_TIM16_UP 110
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#define DMAMUX1_REQ_TIM17_CH1 111
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#define DMAMUX1_REQ_TIM17_UP 112
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#define DMAMUX1_REQ_SAI3A_DMA 113
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#define DMAMUX1_REQ_SAI3B_DMA 114
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#define DMAMUX1_REQ_ADC3_DMA 115
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/* DMAMUX2 request multiplexer inputs (DMAMUX_CR.DMAREQ_ID) */
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#define DMAMUX2_REQ_GEN0 1
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#define DMAMUX2_REQ_GEN1 2
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#define DMAMUX2_REQ_GEN2 3
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#define DMAMUX2_REQ_GEN3 4
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#define DMAMUX2_REQ_GEN4 5
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#define DMAMUX2_REQ_GEN5 6
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#define DMAMUX2_REQ_GEN6 7
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#define DMAMUX2_REQ_GEN7 8
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#define DMAMUX2_REQ_LPUART1_RX_DMA 9
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#define DMAMUX2_REQ_LPUART1_TX_DMA 10
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#define DMAMUX2_REQ_SPI6_RX_DMA 11
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#define DMAMUX2_REQ_SPI6_TX_DMA 12
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#define DMAMUX2_REQ_I2C4_RX_DMA 13
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#define DMAMUX2_REQ_I2C4_TX_DMA 14
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#define DMAMUX2_REQ_SAI4A_DMA 15
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#define DMAMUX2_REQ_SAI4B_DMA 16
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#define DMAMUX2_REQ_ADC3_DMA 17
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#endif /* __DMAMUX_STM32H743_H__ */
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