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bf81914217
Exception handling code assumes at least word alignment of the context buffer. So far we were lucky that compiler placed it correctly but after compiler upgrade I was hit by the bug caused by missalignment of the context buffer. Credit goes to pamaury
107 lines
3.2 KiB
ArmAsm
107 lines
3.2 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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* Copyright (C) 2015 by Marcin Bukat
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "mips.h"
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#include "target-config.h"
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#include "system.h"
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/* Handling of exception:
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* the code can register a "longjmp" buffer to restore the context in case of
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* fault */
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.data
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.align 4
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.global exception_jmp_ctx_ptr
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exception_jmp_ctx_ptr:
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/* buffer contains in order: s0-s7, sp, s8, ra */
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.skip 44 /* = 4 * (9 callee saved registers + sp + ra) */
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.set noreorder
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.section .icode, "ax", %progbits
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/* Prototype: int set_exception_jmp()
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* Return: 1 in case of data abort, 0 otherwise */
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.global set_exception_jmp
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set_exception_jmp:
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la v0, exception_jmp_ctx_ptr
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sw s0, 0(v0)
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sw s1, 4(v0)
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sw s2, 8(v0)
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sw s3, 12(v0)
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sw s4, 16(v0)
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sw s5, 20(v0)
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sw s6, 24(v0)
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sw s7, 28(v0)
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sw sp, 32(v0)
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sw s8, 36(v0)
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sw ra, 40(v0)
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jr ra
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move v0, zero
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/* restore context on read/write error, performs the interrupt return
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* arguments:
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* a0: exception type (EXCEPTION_*) */
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.global restore_exception_jmp
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restore_exception_jmp:
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la v0, exception_jmp_ctx_ptr
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lw s0, 0(v0)
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lw s1, 4(v0)
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lw s2, 8(v0)
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lw s3, 12(v0)
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lw s4, 16(v0)
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lw s5, 20(v0)
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lw s6, 24(v0)
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lw s7, 28(v0)
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lw sp, 32(v0)
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lw s8, 36(v0)
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lw v0, 40(v0)
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mtc0 v0, C0_EPC
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#ifdef CONFIG_JZ4760B
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/* XBurst has a 3 interlock cycle delay, but we don't know if the interlock
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* works with eret */
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nop
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#else
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ehb
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#endif
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move v0, a0 /* set exception type */
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eret
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nop
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.set reorder
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#ifdef CONFIG_FLUSH_CACHES
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.set noreorder
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.text
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.global target_flush_caches
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target_flush_caches:
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/* commit dcache and invalidate icache */
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la t0, 0x80000000 /* an idx op should use an unmappable address */
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ori t1, t0, DCACHE_SIZE /* cache size */
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reloc_dcache_loop:
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cache DCIndexWBInv, 0(t0) /* invalidate and write-back dcache index */
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addiu t0, t0, DCACHE_LINE_SIZE /* bytes per cache line */
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bne t0, t1, reloc_dcache_loop
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nop
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la t0, 0x80000000 /* an idx op should use an unmappable address */
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ori t1, t0, ICACHE_SIZE /* cache size */
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reloc_icache_loop:
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cache ICIndexInv, 0(t0) /* invalidate icache index */
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addiu t0, t0, ICACHE_LINE_SIZE /* bytes per cache line */
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bne t0, t1, reloc_icache_loop
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nop
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jr ra
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nop
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#endif
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