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7418e65138
This replaces the gdb & openocd config in utils/stm32tools and is easier to use. Remove the srst workaround; it seems this was caused by the D1/D3 domains not being powered up while the CPU was in sleep mode. Change-Id: I28cc0273b3004c6e3146bb2447f0655cad8bb1c2
14 lines
519 B
INI
14 lines
519 B
INI
## OpenOCD configuration for STM32H7-based targets with SWD (eg. Echo R1)
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# Setup for STLINK-V3SET + STM32H7
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source [find interface/stlink-dap.cfg]
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source [find target/stm32h7x.cfg]
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# OpenOCD doesn't handle soft breakpoints correctly for Cortex-M7 when ICache is enabled:
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# https://sourceforge.net/p/openocd/mailman/openocd-user/thread/6668098.sCNexbpv2J@linux-5nlr.menet/
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gdb_breakpoint_override hard
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# Resume execution when GDB detaches, instead of halting
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stm32h7x.cpu0 configure -event gdb-detach {
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resume
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}
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