when battery_bench is run
exports a file in the rockbox directory called 'battery_levels.default'
if the user wants their own levels they can rename the file battery_levels.cfg
and it will be loaded at boot
some minimal error checking is performed prior to using the values
added manual entry
Change-Id: Ia0126faced0c7229fcf8385a1bcb584b5a9dc378
Only affected status display, charging is handled entirely by hardware.
Introduced in f3026cd0 (2024-11-02)
Change-Id: I08c7c442fb3bddf18e5a0d33dac963c24d3c9182
The "charging" status is apparently "charging needed" as it
is asserted even when power is not being supplied. So first check
to see if USB is connected, and if so, then check the "charging" status.
Change-Id: I3050f187e0b6c9d97d25d80015b413cd02e5c3b2
* Create new 'sector_t' type alias:
* uint64_t for all targets with HAVE_LBA48 or HAVE_SDUC
* unsigned long for the everything else
* Alter all storage APIs to use sector_t instead of 'unsigned long'
* Alter Volume/Partition/storage info structures to use sector_t
* Disk cache converted to sector_t
* ATA Core:
* convert to using sector_t for sector addresses and drive sizes
* Always fill out upper 16 bits of LBA48 addresses
* IDENTIFY INFO is fixed at 512 bytes, not SECTOR_SIZE
* USB mass storage:
* convert to using sector_t for sector addesses and drive sizes
* Implement READ_16/WRITE_16 for LBA48 addresses
* Convert FAT code to use sector_t for all sector references
* output_dyn_value() now accepts int64_t instead of 'int'
* Corrected "rockbox info" to work for (MULTIVOLUME & !MULTIDRIVE)
* Better reporting of disk and (logical+physical) sector sizes in debug info
* Detect SDUC cards and report on storage debug_info screen
To-do: SDUC
* Refactor SD core to remove duplicate code in every driver
* Card probe and init state machine
* Implement core SDUC support
* SD2.0 needs to be 2.0+ (fixed for jz47xx and x1000)
* Host and Card ID (ACMD41)
* 32-bit addressing for all read/write/erase operations (CMD22)
* ADD SDUC to target device drivers, defining HAVE_SDUC as appropriate
Change-Id: Ib0138781a0081664d11511037685503df1b93608
* xDuoo X3 fix some warnings due to an incorrect #ifdef
* stub storage_removeable() and storage_present() for non-HOTSWAP builds
* sim_trigger_external() is gated by HOTSWAP, not MULTIDRIVE
Change-Id: I38f14fdfeba13957899c378051d49afc2e8245e5
Notably:
* double-paste in ihifi760 config.h
* jz4740 ATA & SD drivers used MULTIVOLUME instead of MULTIDRIVE
* Simulators implicitly rely on HAVE_HOTSWAP
Change-Id: I44fc7f98f0f6df366f016567c330f87e9f3ca6a6
Merge the x1000 and jz47xx exception handling code since they use
the same exception vectors and handlers. The interrupt handler is
now called from the common exception vector, but remains separate
for each board since they have different IRQ layouts.
The new exception handler can provide a stack traceback from the
interrupted code, rather than the (uninteresting) caller traceback
displayed by panicf. This allows you to see what led up to a null
pointer deref or division by zero, which makes it _much_ easier to
track down errors that occur in common leaf functions like strcmp.
Change-Id: I59a0ebb5e40fcb36505c3bfdb47f8cac2f9936b1
Calling multiple levels of indirection in a loop slows things down
Really these need to be rewritten to take a start and end address
like most of the rest of the codebase
But this is safer without having test hardware in hand
Change-Id: Idae7b92ee779d020ed7fcc9334e2d5a9c710e64d
IMHO the current name is somewhat misleading:
- usb_drv_send() is blocking and we have usb_drv_send_nonblocking()
for the non-blocking case. This inconsistent naming can only
promote confusion. (And what would we call a blocking receive?)
- Other hardware abstraction APIs in Rockbox are usually blocking:
storage, LCD, backlight, audio... in other words, blocking is the
default expected behavior, with non-blocking calls being a rarity.
Change-Id: I05b41088d09eab582697674f4f06fdca0c8950af
The abiflags data is only used to communicate ABI information to a
program loader -- you can see what info is stored with readelf -A.
Dropping it shaves 24 bytes off of every binary (including plugins).
Change-Id: Iae78eeffe5c840ff67717707fb94821d24aac8ec
Using a macro to put each function in its own .icode-based section
allows us to put the functions in IRAM _and_ have linker GC. This
removes a troublesome #ifdef BOOTLOADER_SPL on the X1000 target.
Change-Id: Ia7b59778f5c36b7970dee4280547e434a1f4fc5a
The X3's line out is a bit hot, at ~4.3Vpp, so allow it to be backed off.
(On my X3, backing it off to -6dB brings Vpp down to ~3.4V)
Change-Id: Iea38ef1c6a1b183d0f8fb4eaf2bf9ed6b350a532
Enable its use in the jz47xx MIPS targets.
(accidently committed g#3249 before making these changes)
Change-Id: I1791946f632901f0c7a94b04b009671aa0d71717
- The range-based cache operations on MIPS were broken and only worked
properly when BOTH the address and size were multiples of the cache
line size. If this was not the case, the last cache line of the range
would not be touched!
Fix is to align start/end pointers to cache lines before iterating.
- To my knowledge all MIPS processors have a cache, so I enabled
HAVE_CPU_CACHE_ALIGN by default. This also allows mmu-mips.c to use
the CACHEALIGN_UP/DOWN macros.
- Make jz4760/system-target.h define its cache line size properly.
Change-Id: I1fcd04a59791daa233b9699f04d5ac1cc6bacee7
* pcm_get_bytes_remaining()
* pcm_calculate_peaks()
* pcm_get_peak_buffer()
Nothing in-tree uses these at all (except for the lua plugin wrapper)
Change-Id: I971b7beed6760250c8b1ce58f401a601e1e2d585
Nothing in the core has used it for some time. It's exported to the
plugin API but the last plugins to use it were switched to the mixer API
back in 2011.
This allows us to get rid of pcm_play_dma_pause() from all audio drivers
Change-Id: Ic3fa02592316f84963e41d792d1cabb436d1ff6b
Whether or not this is correct depends on how the source material was
mastered, digitized, and/or encoded. There is no setting appropriate
for everything.
Eventually I'd like to make this configurable, but I'd want to have it
shared with more than one target first.
Change-Id: I20a0eff4b3dc2517c33db49d4f72e85bf81d1ca6
Note: PCM mix buffer sizes are _way_ too small for these high bitrates
(We really need to make the mixer stuff use dynamic buffer sizes based
on the bitrate. Maybe pre-allocate a max size based on upper bitrate limit,
but use only part of it at lower bitrates? So we can have sane latency..)
Change-Id: Id7b4afd73dba7f1ffb84b2e1c016859fae5d6835
Can be disabled at runtime by setting hold switch.
Boosts sysbench sequential write performance by 34-58%
Change-Id: I060c9d7dddc1b448f18aa46af8f8aff046e07843
* DMA Bulk IN (ie our TX) results in sequential transfers 33-68% faster.
* DMA Bulk OUT (ie RX) is mostly stripped out due to complete brokenness.
* Interrupt and control endpoints remain PIO-driven.
Other improvements:
1) Use consistent endpoint references (no magic numbers)
2) Greatly enhanced logging
3) DMA support can be compiled out completely
4) Setting lockswitch will disable all DMA operations at runtime
5) Much more robust error checking and recovery
Change-Id: I57b82e655e55ced0dfe289e379b0b61d8fe443b4
Fixes deficiencies with the button system on the X3
The x3 has an interesting button layout.
Multiple key presses are NOT supported unless
[BUTTON_POWER] is one of the combined keys
As you can imagine this causes problems as the power button takes
precedence in the button system and initiates a shutdown if the
key is held too long
instead of BUTTON_POWER use BUTTON_PWRALT in combination with other keys
IF using as a prerequsite button then BUTTON_POWER should be used
Multiple buttons are emulated by button_read_device but there are a few
caveats to be aware of:
Button Order Matters!
different keys have different priorities, higher priority keys 'overide'
the lower priority keys
VOLUP[7] VOLDN[6] PREV[5] NEXT[4] PLAY[3] OPTION[2] HOME[1]
There will be no true release or repeat events, the user can let off the
button pressed initially and it will still continue to appear to be
pressed as long as the second key is held
Tree scrolling is PLAY+NEXT or PLAY+PREV
Change-Id: I88dfee1c70a6a99659e8227f5becacc50cc43910
Group commands for a bit more speed
bitdelay was not being inlined
lower bitdelay to 12 cycles
Clean-up magic numbers
Change-Id: Ifeb57a5532807a598f1ec5e1c55f03e4aa1e133f
* Increase audio buffer size to better handle IRQ latency (256->2048)
* Ensure DMA engine is idle prior to starting transfers
* Set AIC to repeat last sample in case of underflows
Change-Id: I9c45c20481ee072e5882b7586fb7d50bd8ef2f35
