Even though ARMv7-M has a hardware divider, 64-bit division is
handled in software and needs a div0 handler. The libgcc routines
call __aeabi_{i,l}div0 so we alias those to __div0.
Change-Id: I5152c43d39e25e03f31404753f13978a614aca06
M-profile cores manage interrupts differently from classic cores
and lack the FIQ. Split the interrupt management parts out into
separate headers but keep the endian swapping routines (which are
not profile-dependent) in the common system-arm header.
The initial part of the vector table is common to all Cortex-M
CPUs and is intended to be included by the target linker script,
with the vendor-specific part of the vector table appended to it.
Change-Id: Ib2ad5b9dc41db27940e39033cfef4308923db66d
