We expect a fixed FRAMEBUFFER_SIZE that's width*height*bitdepth, and we
mmap()ed that in. However, when doing the initial fb clear, we
were using the hardware-provided 'finfo.smem_len' which could be
larger than FRAMEBUFFER_SIZE. This overran our mmap and triggered
a segfault.
Correct this by mmaping (and clearing) the entire smem_len. As a safety
measure, panic if smem_len is smaller than our expected FRAMEBUFFER_SIZE
Change-Id: I3222139c7aed6e8e8ee232b1730edd5cd70065ff
GPT superblocks are located at sector 1 and max_sector-1. If the system
uses a "virtual" sector that's larger than the drive's logical sector,
we need to map those virtual sector numbers to the drive's logical
sector.
If DEFAULT_VIRT_SECTOR_SIZE is defined, try that multiplier as well
as the standard multiplier of 1.
It's not practical to try every intermediate value so instead, if
DEFAULT_VIRT_SECTOR_SIZE is defined, try that as well as the standard
multiplier of 1.
This still leaves a handful of targets that don't set DEFAULT_VIRT
but do set MAX_VIRT.
Change-Id: I3accffcb97436b043836e072bfc620318a9b1230
Basically the GPT is supposed to live at sector 1, but a backup copy is
stored on the final sector.
This gives us a little bit of extra flexibility on systems that might
require sector 1 for other things, but in any case it's a more robust
arrangement.
Change-Id: I8925ffc743629cf2eba51861042492e35b41664b
A function that returned bool was an alias for a function that returned
an int. While that original function was limited to returning either 0
or 1, this aliasing is technially a no-no. So create a small shim to
make the warning go away.
Change-Id: I4d7807730234928bd59d75f13a4e4adeabbf655e
We normally create a table of the partition sizes/types present
on a drive. Howeever, if the drive is set up as a "superfloppy",
where there is no partition table and a single filesystem starting
at sector 0, this "pinfo" table is not populated.
So now, populate the pinfo table with a single entry that matches
the filesystem type, start, and size.
Change-Id: Ifa8760909109d67ff96481b1fc7f26c64280a00a
The Echo R1 is a new open-hardware music player design, based
on the STM32H743 microcontroller. Schematics and hardware
documentation for it can be found here:
- https://github.com/amachronic/echoplayer
This is an incomplete port. The bootloader can be loaded using
OpenOCD and it can draw to the LCD using SPI. SDRAM is working
but hasn't been extensively tested.
Change-Id: Ifd2bee15c49868fbc989683d3ca14dce48bf3e18
-Wunterminates-string-initialization will complain if we try to shove
a "string" into a fixed array that is too small. Sometimes this is
intentional; when you are merely using "string" as a standin for
"non-terminated sequence of bytes". In these cases we need to mark
the "string" as "not actually a string" with an attribute. Applies to
GCC >=8, but this warning isn't pulled in by -Wextra until GCC >= 15.
Change-Id: Ib94410a22f4587940b16cf03d539fbadc3373686
To keep the code size small, this hardcodes the D-Cache line
size and set/way information (which is defined by the target
and should be fixed for a given CPU) and assumes there is only
one level of cache.
Change-Id: Ia6d0e6a87b5dbfc6c39bda83b58461ed8767edf6
Cortex-M processors don't have an MMU, but can still have caches
that need software management, so on those platforms we don't want
to include the MMU related functions.
While here, remove an outdated section of a comment referring to
deprecated cache maintenance functions which no longer exist.
Change-Id: I6f0fe694560bdee25ed7c69a846bf46e3e544cb1
Cortex-M7 support was added in GCC 5, while GCC 4.9 only
supports the M4. The instruction set is almost identical
between both processors; the only difference is that the
M7 supports double-precision floating point and the M4
doesn't.
Since Rockbox currently doesn't use the FPU, building M7
targets as M4 works fine.
Change-Id: I5880d6e81a85fa9b3e16e08d57e7955b4493df0b
Even though ARMv7-M has a hardware divider, 64-bit division is
handled in software and needs a div0 handler. The libgcc routines
call __aeabi_{i,l}div0 so we alias those to __div0.
Change-Id: I5152c43d39e25e03f31404753f13978a614aca06
Currently, only the development bootloader can be built successfully.
This is a part of the large iPod Nano 3G and iPod Nano 4G support patch.
Credit: Cástor Muñoz <cmvidal@gmail.com>
Change-Id: I74ea0da999ddb1d8ce5d0f5434141b3f0b5f7448
Currently, only a bootloader can be built successfully. The development bootloader is functional, it enables further progress on the port.
This is a part of the large iPod Nano 3G and iPod Nano 4G support patch.
Credit: Cástor Muñoz <cmvidal@gmail.com>
Change-Id: Idf85e42334b0e0ae36f9ed273e2940d5d7736e34
M-profile cores manage interrupts differently from classic cores
and lack the FIQ. Split the interrupt management parts out into
separate headers but keep the endian swapping routines (which are
not profile-dependent) in the common system-arm header.
The initial part of the vector table is common to all Cortex-M
CPUs and is intended to be included by the target linker script,
with the vendor-specific part of the vector table appended to it.
Change-Id: Ib2ad5b9dc41db27940e39033cfef4308923db66d
GCC cannot compile the existing assembly here on ARMv7-M,
claiming impossible constraints. It is actually possible to
compile if the input arguments (addresses and sizes) are
first moved to a high register so as not to conflict with
the use of r0-r7 in ldm/stm -- this is exactly what GCC does
for ARMv6, but it won't do it on ARMv7-M for some reason.
We can get a result similar to the ARMv6 code by manually
moving the inputs into temporaries, but the generated code
is a actually a bit smaller on ARMv7-M if the r0-r7 block is
shifted up to r3-r10. This only works since ARMv7-M supports
the 32-bit Thumb encoding -- 16-bit Thumb can't represent an
ldm/stm instruction of this type.
It's worth #ifdef'ing the code because although the ARMv7-M
version works on ARMv6 too, it spills a lot of registers on
the stack even though register use is mostly similar.
Change-Id: I9bc8b5c76e198aecfd0a0e7a2158b1c00f82c4df
On ARMv7-M, stm/ldm instructions can't include SP, so we must
load and store that separately. This changes the order of
registers in the context struct, but it doesn't seem to be
accessed anywhere else so this shouldn't cause any problems.
Change-Id: Ie1cd23272f23384e030f51f0b76739624fa7332b
Commit 1fb906500a ("x1000: LCD DMA fix") caused a regression
on the Q1 by breaking the LCD_X1000_DMA_WAIT_FOR_FRAME logic,
since the wrong branch of lcd_wait_frame() was taken.
Change-Id: Icb44335f506a1a691280de8219188526bb11468f
All the X1000 targets use "fast" sleep, as opposed to the normal
HAVE_LCD_SLEEP define which creates a user-configurable option.
Remove the ifdefs to make the code a bit easier to read.
Change-Id: Ibb80c92a8e23191651fee61fc8cf6f4e4fac8750
Looks like they were always off-by-one, so the wrong functions have been used to rectify this bug. This is now properly fixed.
No changes to the ipodnano2g binaries (bootloader, rockbox)
Change-Id: I19fe1b89f9e5d722f7e877d60f68fc3275c3642a
This makes these files compileable, or in some cases less
broken, on Cortex-M targets.
In lcd-16bit.c, newer versions of GAS complain about the
infix condition codes so we use the suffix form instead,
which requires unified syntax to compile on GCC 4.9.
Change-Id: If45166d3fc83d64c692cbb331096a966397aa9e9
ARMv7-M has hardware division, so it doesn't require __div0
or any support functions for 32-bit division.
Change-Id: I840683a1a77d737f378899ca4bcf858216b81014
Add some logic to detect classic and M-profile cores, and make
this info available to the build system. All existing targets
are classic profile.
Change-Id: I07bfcd418bcaa6297b9bbf889fc189f167147428
-1 could be supplied unintentionally from user code when utf8_size is computable value
Fixup for 004304dc and 1f548f74
Change-Id: I93008ea289bdb134f051975c25b0db9d0e64b823
This mirrors the behavior of idle poweroff,
which inhibits shutdown as long as a charger
is plugged in, even if a device is capable
of powering off while charging.
Since usb_inserted() already checks for USB_POWERED,
certain devices with the ability to power off while
charging, already exhibit this behavior when using
the sleep timer anyway.
Change-Id: I35ed4b542a8a4df06a34395c85f4d37fc1d2ce53
try #2 at this
if there isn't enough data remaining to fill the columns
then don't read any more data
looking at the blame for this driver it had similar logic originally
But really on native this is just extra overhead so..
Ifdef out for native
Change-Id: I105dea1f7adc0448f345b268fcfa8574333132a9
1-bit vertical displays overread the buffer due to the way the
packing works, this isn't the hottest path anyway but
we can check if height <= 8 and make stride 0 so the dummy data
gets the beginning of the data instead
Change-Id: I88ab4dc37bfd2d680d125f964beafe0ddfb00645
When a line is over a selected length bi-directional scrolling
is disabled.
In non bidir scrolling the string is copied to a buffer twice with
a space between "scroll text" + " " + "scroll text"
this is to allow scrolling the line in the forward direction
with minimal extra logic
Note: that is the ONLY direction it is equiped to handle
In the USB screen I observed while switching through the different modes
that sometimes the text was corrupted
turns out you can still have scroll->backwards set to true
which causes offset to go negatve but we never check if offset < 0
in non bidir scrolling mode and happily continue with ever more negative offsets
Change-Id: I210f7880be953d3cc42469828a7ca5fc2b2ab96f
the YPR1 apparently can do voltage or percent measure
I'm pretty sure its missing logic for disksafe and shutdown,
perhaps the device takes care of it for you?
hopefully someone with the device notices the issue
(perhaps due to a older battery needing capacity tweaked)
Change-Id: I79d3927fa8b154ba231aa6894de7920a4e4dd4c7
when battery_bench is run
exports a file in the rockbox directory called 'battery_levels.default'
if the user wants their own levels they can rename the file battery_levels.cfg
and it will be loaded at boot
some minimal error checking is performed prior to using the values
added manual entry
Change-Id: Ia0126faced0c7229fcf8385a1bcb584b5a9dc378
GCC 9.5 issues a -Wmisleading-indentation warning due to an extra
semicolon at the end of the while loop. It does seem unintentional
since the loop is a busy wait, so remove the semicolon.
Change-Id: I83b8676cbf38434b8148c43906c6bba9c16d036e
