The DMA xfr size was fixed at 512 bytes, but the count was specified
in terms of the logical sector size (ie 4096 bytes).
Make the DMA size line up with the sector size.
Change-Id: Id9d0088b12775223f8d888f21b19e17c97927570
The goal of this was to have the ipod6g's ata driver report
proper vendor/model information from storage_info()
Change-Id: I64c1aee87c817cac23c90e062333a4ba3545dfaf
Original commit credit to Amaury Pouly, Moshe Piekarski
Pushed across the finish line by Dana Conrad
To enable, see setting under General Settings --> System --> USB-DAC.
On devices with few endpoints, this may not work while HID and/or
mass storage is enabled.
Adds new dedicated mixer channel.
setting usb-dac can have values:
- never (0)
- always (1)
- while_charge_only (2)
- while_mass_storage (3)
Relevant devices are DWC2 and ARC usb controller devices. That being:
x1000 Native targets (m3k, erosqnative, q1, others...?),
sansac200, creativezenxfi2, vibe500, ipodmini2g,
ipod4g, creativezenxfi, creativezenxfi3, sansaview, ipodcolor,
creativezenxfistyle, samsungypz5, sansafuzeplus, iriverh10_5gb,
tatungtpj1022, gigabeats, faketarget, samsungyh820, gogearhdd1630, samsungyh925, ipodmini1g, ipodvideo, creativezenmozaic, sonynwze370, creativezen, gogearsa9200, gogearhdd6330, sonynwze360, sansae200, mrobe100, iriverh10, creativezenv, ipodnano1g, samsungyh920
USB Driver-wise, it should be noted that this patch requires some
slight changes:
- proper blocking on control OUT transfers, to make sure the data is
received *before* using it, the usb_core should probably use that too
- drivers can now support interface alternate settings
- drivers can be notified of completion by a new fast handler, which
is called directly from the driver; this is is necessary for
isochronous transfers because going through the usb queue is way too
slow
Designware changes:
- enable for USBOTG_DESIGNWARE
- set maxpacketsize to 1023 for ISO endpoints
Change-Id: I570871884a4e4820b4312b203b07701f06ecacc6
Version 1: this patch prolongs startup time by 2 seconds, because the
sleep happens early before other threads have started.
The patch is tested on CreativeZEN and Fuze+.
The datasheet was not very helpfull, so some experimentation was needed.
I came to the following conclusions:
* setting HP to ground:
to prevent popping noises, the headphone output can be set to ground.
This however must be done before any part of the audioout module is
powered up (setting HP to ground itself will lead to a pop otherwise).
This consequently means that HP must NOT be set to ground for powerdown
sequence!
Further study showed that setting HP out to ground has no audible benefit,
controversly not setting/resetting allows for noiseless RoLo-ing.
* headphone amp class A/AB mode:
initially the HP amp is in class A mode, and should be set to
class AB before playing audio, as the datasheet mentions.
If the HP output is set to ground, it must be released BEFORE
setting class AB! Releasing from ground while in AB mode leads
to a very loud pop!
* release HP from ground:
as said before: never release the HP from ground if the HP amp is
set to class AB mode. Therefore the correct order is to power up the
headphone amp, wait some time, release HP from ground, and then
set the amp to class AB mode.
To prevent pop, some time is needed before releasing the HP from gnd.
On CreativeZEN 2 sec seems to be ideal; 1 sec have no audible effect,
1.5 sec softenes the pop to some degree.
* shutting player off
The popping noise when shutting off is much quieter that on power up,
so depopping measures are not absolutely necessary.
However the power off pop can be silenced by inserting a wait time
after the audioout block is closed and before the rest of the chip
is powered down. The longer the better, a time of 5 sec practically
eliminates the pop.
Note that RoLo-ing can still produce noise, because the audio device
is not properly shut down.
Change-Id: Ib20e1d613b346433d2a711c442e303ededc26e78
Added lcd inversion
Fix issue where backlight would turn on before first frame rendered
Fix issue where backlight would shortly appear at 100% before PWM is
ready during fade in
Turn off backlight before booting/RoLo/shutdown to avoid it being
enabled on next boot
Fix issue where fade in isn't smooth because brightness levels below 13 were
basically equalivent to off, by removing these brightness levels
Change-Id: I868eae2cbeea52c6af7d09c886958ff46167fe26
Basically use proper register names instead of magic values.
PP5002-based ipods (ie ipod1g-3g) use UART1 to drive the piezo vs
PWM of the newer models.
Change-Id: Ia333717a825ac6a0ebf43850fc31fca34178dd88
ata-creativezen looks like a legit memory-trashing bug, the rtc fixes
are bitwise inversion of a bool, and the remaining are just unused
static variables.
Change-Id: I1a818d4839cd3a54ca6e85f26feb743a4a9d29dc
Therefore, turn on MAX_VARIABLE_LOG_SECTOR so we can support 512B and 4K
sector sizes. Additionally, correct the interpretation of identify info
word 106 in CE-ATA mode.
Change-Id: I24dc7dd4a8617fcb60ed87c0c1be98d00dbdfa30
There are numerous sub-commands, this makes it possible to call the others.
Also in this patch is the ability for the "default" ATA driver to
query smart data too
Change-Id: Ie3aaf9e0b2d7a5d25d09dea34e4f10ee29047e1b
* move all state into IRAM
* eliminate dummy variables
* get rid of 'naked' attribute and (slightly wasteful) hand-written asm
in favor of auto-created 'interrupt' code
Change-Id: Ie6a2e12a4c1a0faa6ae89504cf931657044bd457
By default STMP3700 launches from negative edge for capture on positive edge.
If we leave DPL (bit 13 of reg 0x13) to 0, it will be captured on falling edge,
resulting in a potentially undefined behavior. Some make sure LCD captures on
rising edge. Alternatively we could change the dotclk polarity in VDCTRL0.
Change-Id: I4ceb2f5a9be88e07f0af9bf493b7881883320fda
iap_reset_state() and iap_getc() are now passed the logical IAP port
(0 is dock/only connector, 1 is headphone connector)
Change-Id: I97421146a8cab032b90c9b4eb55b50aa00d73312
* Move to a structure instead of pointers to registers
* Autobaud operates per-uart
* When explitily setting uart speed, it applies to all uarts
This allows both UARTs to be enabled and serviced simultaneously,
allowing either accessory port to be used. Note that the last
port to receive something is where subsequent transmits are directed,
and only one set of IAP state is maintained.
To change this, we will need to revamp IAP to support more than
one state machine, and then extend the serial API to allow for both
UARTs to be used independently. Probably not worth the effort.
Change-Id: I0142f0906706fc0c4ee6d6d7aa6b0515e1a749dd
This caused the devices to crash a few seconds after sending the command. A small power consumption increase is possible when the screen is off with this patch, but Rockbox doesn't crash anymore. Type 0 and 1 are not affected as they use a completely different sequence.
Tested on iPod 6G LCD type 1 and LCD type 2. Type 0 is similar to Type 1, Type 3 is similar to Type 2, so it should cover all available LCD types.
Change-Id: I3e8a653ca22bf59e3db38e1d26e747b358e62cb2
This should allow either accesspory port to be used for IAP comms.
No regressions on an ipodphoto and mini2g through the dock connector,
but I don't have any headset-attached accessories to test against.
Change-Id: If217d8147ee871b20ad5f81ba95542379eb9f2dc
This lets us have multiple serial ports enabled, which will help with
4th-gen ipods that have a serial port in the HP jack as well in the dock.
Change-Id: I6a00a776020848a6908413e05a6f27bad65b2d8e
A function that returned bool was an alias for a function that returned
an int. While that original function was limited to returning either 0
or 1, this aliasing is technially a no-no. So create a small shim to
make the warning go away.
Change-Id: I4d7807730234928bd59d75f13a4e4adeabbf655e
The Echo R1 is a new open-hardware music player design, based
on the STM32H743 microcontroller. Schematics and hardware
documentation for it can be found here:
- https://github.com/amachronic/echoplayer
This is an incomplete port. The bootloader can be loaded using
OpenOCD and it can draw to the LCD using SPI. SDRAM is working
but hasn't been extensively tested.
Change-Id: Ifd2bee15c49868fbc989683d3ca14dce48bf3e18
To keep the code size small, this hardcodes the D-Cache line
size and set/way information (which is defined by the target
and should be fixed for a given CPU) and assumes there is only
one level of cache.
Change-Id: Ia6d0e6a87b5dbfc6c39bda83b58461ed8767edf6
Cortex-M processors don't have an MMU, but can still have caches
that need software management, so on those platforms we don't want
to include the MMU related functions.
While here, remove an outdated section of a comment referring to
deprecated cache maintenance functions which no longer exist.
Change-Id: I6f0fe694560bdee25ed7c69a846bf46e3e544cb1
Even though ARMv7-M has a hardware divider, 64-bit division is
handled in software and needs a div0 handler. The libgcc routines
call __aeabi_{i,l}div0 so we alias those to __div0.
Change-Id: I5152c43d39e25e03f31404753f13978a614aca06
Currently, only the development bootloader can be built successfully.
This is a part of the large iPod Nano 3G and iPod Nano 4G support patch.
Credit: Cástor Muñoz <cmvidal@gmail.com>
Change-Id: I74ea0da999ddb1d8ce5d0f5434141b3f0b5f7448
Currently, only a bootloader can be built successfully. The development bootloader is functional, it enables further progress on the port.
This is a part of the large iPod Nano 3G and iPod Nano 4G support patch.
Credit: Cástor Muñoz <cmvidal@gmail.com>
Change-Id: Idf85e42334b0e0ae36f9ed273e2940d5d7736e34
M-profile cores manage interrupts differently from classic cores
and lack the FIQ. Split the interrupt management parts out into
separate headers but keep the endian swapping routines (which are
not profile-dependent) in the common system-arm header.
The initial part of the vector table is common to all Cortex-M
CPUs and is intended to be included by the target linker script,
with the vendor-specific part of the vector table appended to it.
Change-Id: Ib2ad5b9dc41db27940e39033cfef4308923db66d
Looks like they were always off-by-one, so the wrong functions have been used to rectify this bug. This is now properly fixed.
No changes to the ipodnano2g binaries (bootloader, rockbox)
Change-Id: I19fe1b89f9e5d722f7e877d60f68fc3275c3642a
ARMv7-M has hardware division, so it doesn't require __div0
or any support functions for 32-bit division.
Change-Id: I840683a1a77d737f378899ca4bcf858216b81014
when battery_bench is run
exports a file in the rockbox directory called 'battery_levels.default'
if the user wants their own levels they can rename the file battery_levels.cfg
and it will be loaded at boot
some minimal error checking is performed prior to using the values
added manual entry
Change-Id: Ia0126faced0c7229fcf8385a1bcb584b5a9dc378
GCC 9.5 issues a -Wmisleading-indentation warning due to an extra
semicolon at the end of the while loop. It does seem unintentional
since the loop is a busy wait, so remove the semicolon.
Change-Id: I83b8676cbf38434b8148c43906c6bba9c16d036e
On PATA, we'd cap our transers at UDMA2 if the device reported that an
80 pin cable wasn't detected, but SATA devices do not perform this test.
So alter the check to only apply on PATA devices, so that SATA devices
can run at full UDMA speeds.
Change-Id: Id7aa25f2a702c0af73d707395439d69da1e04719
