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Remap flash ROM to 0x20000000 on the ipods and H10s, and implement dbg_save_roms() in the debug menu for those targets to dump the content to a file.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12467 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman 2007-02-23 23:22:03 +00:00
parent 87865a5227
commit fda1498696
13 changed files with 73 additions and 1 deletions
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21
apps/debug_menu.c
View file

@ -1983,6 +1983,24 @@ static bool dbg_save_roms(void)
return false;
}
#elif defined(IPOD_ARCH) || defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
static bool dbg_save_roms(void)
{
int fd;
#if defined(IPOD_ARCH)
fd = creat("/internal_rom_000000-0FFFFF.bin");
#elif defined(IRIVER_H10)
fd = creat("/internal_rom_000000-3FFFFF.bin");
#endif
if(fd >= 0)
{
write(fd, (void *)0x20000000, FLASH_SIZE);
close(fd);
}
return false;
}
#endif /* CPU */
#ifndef SIMULATOR
@ -2305,7 +2323,8 @@ bool debug_menu(void)
{ "Button Light modes", dbg_buttonlights },
#endif
#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE) || \
defined(IPOD_ARCH) || defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
{ "Dump ROM contents", dbg_save_roms },
#endif
#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE) || defined(CPU_PP)

3
firmware/export/config-h10.h
View file

@ -107,6 +107,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 75000000

3
firmware/export/config-h10_5gb.h
View file

@ -101,6 +101,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
/* TODO: this is probably wrong */
#define CPU_FREQ 75000000

3
firmware/export/config-ipod3g.h
View file

@ -95,6 +95,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

3
firmware/export/config-ipod4g.h
View file

@ -101,6 +101,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

3
firmware/export/config-ipodcolor.h
View file

@ -92,6 +92,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

3
firmware/export/config-ipodmini.h
View file

@ -95,6 +95,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

3
firmware/export/config-ipodmini2g.h
View file

@ -98,6 +98,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

3
firmware/export/config-ipodnano.h
View file

@ -97,6 +97,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 24000000

3
firmware/export/config-ipodvideo.h
View file

@ -97,6 +97,9 @@
/* The start address index for ROM builds */
#define ROM_START 0x00000000
/* The size of the flash ROM */
#define FLASH_SIZE 0x100000
/* Define this to the CPU frequency */
#define CPU_FREQ 11289600

9
firmware/export/pp5002.h
View file

@ -113,6 +113,15 @@
#define SER1_MASK (1 << SER1_IRQ)
#define DMA_OUT_MASK (1 << DMA_OUT_IRQ)
#define MMAP0_LOGICAL (*(volatile unsigned long*)(0xf000f000))
#define MMAP0_PHYSICAL (*(volatile unsigned long*)(0xf000f004))
#define MMAP1_LOGICAL (*(volatile unsigned long*)(0xf000f008))
#define MMAP1_PHYSICAL (*(volatile unsigned long*)(0xf000f00c))
#define MMAP2_LOGICAL (*(volatile unsigned long*)(0xf000f010))
#define MMAP2_PHYSICAL (*(volatile unsigned long*)(0xf000f014))
#define MMAP3_LOGICAL (*(volatile unsigned long*)(0xf000f018))
#define MMAP3_PHYSICAL (*(volatile unsigned long*)(0xf000f01c))
/* The PortalPlayer USB controller uses base address 0xc5000000 */
#define USB_BASE 0xc5000000

9
firmware/export/pp5020.h
View file

@ -174,6 +174,15 @@
#define IISFIFO_WR (*(volatile unsigned long*)(0x70002840))
#define IISFIFO_RD (*(volatile unsigned long*)(0x70002880))
#define MMAP0_LOGICAL (*(volatile unsigned long*)(0xf000f000))
#define MMAP0_PHYSICAL (*(volatile unsigned long*)(0xf000f004))
#define MMAP1_LOGICAL (*(volatile unsigned long*)(0xf000f008))
#define MMAP1_PHYSICAL (*(volatile unsigned long*)(0xf000f00c))
#define MMAP2_LOGICAL (*(volatile unsigned long*)(0xf000f010))
#define MMAP2_PHYSICAL (*(volatile unsigned long*)(0xf000f014))
#define MMAP3_LOGICAL (*(volatile unsigned long*)(0xf000f018))
#define MMAP3_PHYSICAL (*(volatile unsigned long*)(0xf000f01c))
/* The PortalPlayer USB controller uses base address 0xc5000000 */
#define USB_BASE 0xc5000000

8
firmware/system.c
View file

@ -754,6 +754,10 @@ void ipod_set_cpu_frequency(void)
void system_init(void)
{
#ifndef BOOTLOADER
/* Remap the flash ROM from 0x00000000 to 0x20000000. */
MMAP3_LOGICAL = 0x20000000 | 0x3a00;
MMAP3_PHYSICAL = 0x00000000 | 0x3f84;
/* The hw revision is written to the last 4 bytes of SDRAM by the
bootloader - we save it before Rockbox overwrites it. */
ipod_hw_rev = (*((volatile unsigned long*)(0x01fffffc)));
@ -897,6 +901,10 @@ static void ipod_set_cpu_speed(void)
void system_init(void)
{
#ifndef BOOTLOADER
/* Remap the flash ROM from 0x00000000 to 0x20000000. */
MMAP3_LOGICAL = 0x20000000 | 0x3a00;
MMAP3_PHYSICAL = 0x00000000 | 0x3f84;
ipod_hw_rev = (*((volatile unsigned long*)(0x01fffffc)));
outl(-1, 0xcf00101c);
outl(-1, 0xcf001028);