FS#10048 : enable MMU and data cache on Sansa AMS to give a major speed up

- cache IRAM and DRAM
- map IRAM just next to DRAM to remove the need for -mlong-calls and reduce binsize
- tweak delays in Fuze button code
- tweak delays in Clip button code (down button sometimes doesn't respond anyway : an alternate driver is being worked on)

Before reporting any problem, please check your filesystem or format your player from the OF

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21228 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2009-06-08 23:05:33 +00:00
parent 20a78a36f3
commit f504153857
13 changed files with 84 additions and 54 deletions

View file

@ -36,6 +36,8 @@
#include "power.h"
int show_logo(void);
void main(void) __attribute__((naked, noreturn));
void main(void)
{
unsigned char* loadbuffer;

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@ -374,6 +374,7 @@ target/arm/as3525/usb-as3525.c
target/arm/as3525/dma-pl081.c
target/arm/as3525/ascodec-as3525.c
#ifndef BOOTLOADER
target/arm/mmu-arm.S
drivers/generic_i2c.c
target/arm/adc-as3514.c
target/arm/as3525/audio-as3525.c

View file

@ -27,9 +27,11 @@
/* we put the codec buffer in IRAM */
#define AMS_LOWMEM
#endif
/* these addresses are valid after mapping through the MMU */
/* Virtual addresses */
/* Do not apply to the bootloader, which uses physical addresses (no MMU) */
#define DRAM_ORIG 0x30000000
#define IRAM_ORIG 0x0
#define IRAM_ORIG (DRAM_ORIG + DRAM_SIZE) /* IRAM is mapped just next to DRAM */
#define DRAM_SIZE (MEMORYSIZE * 0x100000)
#define IRAM_SIZE 0x50000
@ -40,8 +42,7 @@
#define ECCBYTES 3
/* AS352X MMU Page Table Entries */
/* to be implemented */
#define TTB_SIZE 0x0
#define TTB_SIZE 0x4000
#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
@ -493,4 +494,7 @@ interface */
#define I2SOUT_CLEAR (*(volatile unsigned char*)(I2SOUT_BASE+0x10))
#define I2SOUT_DATA (volatile unsigned long*)(I2SOUT_BASE+0x14)
/* PCM addresses for obtaining buffers will be what DMA is using (physical) */
#define HAVE_PCM_DMA_ADDRESS
#endif /*__AS3525_H__*/

View file

@ -55,6 +55,12 @@ SECTIONS
{
loadaddress = DRAM_ORIG;
.vectors :
{
_vectors_start = .;
*(.init.text)
} > DRAM
.text :
{
_loadaddress = .;
@ -83,14 +89,6 @@ SECTIONS
*(.eh_frame)
}
.vectors IRAMORIG:
{
_vectors_start = .;
*(.init.text)
} > IRAM AT > DRAM
_vectorscopy = LOADADDR(.vectors);
.iram :
{
_iramstart = .;

View file

@ -595,7 +595,7 @@ static int sd_select_bank(signed char bank)
dma_enable_channel(0, card_data, MCI_FIFO(INTERNAL_AS3525), DMA_PERI_SD,
DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
MCI_DATA_TIMER(INTERNAL_AS3525) = 0x1000000; /* FIXME: arbitrary */
MCI_DATA_TIMER(INTERNAL_AS3525) = 0xffffffff;/* FIXME: arbitrary */
MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ |
(0<<1) /* transfer direction */ |
@ -618,7 +618,8 @@ static int sd_select_bank(signed char bank)
}
#define UNALIGNED_NUM_SECTORS 10
static int32_t aligned_buffer[UNALIGNED_NUM_SECTORS* (SECTOR_SIZE / 4)];
static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32))); /* align on cache line size */
static unsigned char *uncached_buffer = UNCACHED_ADDR(aligned_buffer);
static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
int count, void* buf, const bool write)
@ -627,7 +628,6 @@ static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
const int drive = 0;
#endif
int ret = 0;
bool unaligned_transfer = (int)buf & 3;
/* skip SanDisk OF */
if (drive == INTERNAL_AS3525)
@ -693,16 +693,11 @@ static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
transfer = BLOCKS_PER_BANK - bank_start;
}
if(unaligned_transfer)
{
dma_buf = aligned_buffer;
if(transfer > UNALIGNED_NUM_SECTORS)
transfer = UNALIGNED_NUM_SECTORS;
if(write)
memcpy(aligned_buffer, buf, transfer * SECTOR_SIZE);
}
else /* Aligned transfers are faster : no memcpy */
dma_buf = buf;
dma_buf = aligned_buffer;
if(transfer > UNALIGNED_NUM_SECTORS)
transfer = UNALIGNED_NUM_SECTORS;
if(write)
memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
/* Set bank_start to the correct unit (blocks or bytes) */
if(!(card_info[drive].ocr & (1<<30))) /* not SDHC */
@ -734,8 +729,8 @@ static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start,
wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
if(!retry)
{
if(unaligned_transfer && !write)
memcpy(buf, aligned_buffer, transfer * SECTOR_SIZE);
if(!write)
memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
buf += transfer * SECTOR_SIZE;
start += transfer;
count -= transfer;

View file

@ -6,17 +6,11 @@ OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm)
STARTUP(target/arm/crt0.o)
/*
No need for DRAM in our bootloader
#define DRAMSIZE (MEMORYSIZE * 0x100000) - TTB_SIZE
#define DRAMORIG 0x30000000
*/
#define IRAMORIG 0x81000000
#define IRAMSIZE 0x50000
MEMORY
{
/*DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE*/
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
}

View file

@ -28,6 +28,7 @@
#include "panic.h"
#include "as3514.h"
#include "audiohw.h"
#include "mmu-arm.h"
#define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
* i.e. 32 bits at once (size of I2SO_DATA)
@ -69,6 +70,7 @@ static void play_start_pcm(void)
CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
CGU_AUDIO |= (1<<11);
clean_dcache_range((void*)addr, size); /* force write back */
dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
dma_callback);
@ -164,6 +166,15 @@ const void * pcm_play_dma_get_peak_buffer(int *count)
return (const void*)dma_start_addr;
}
#ifdef HAVE_PCM_DMA_ADDRESS
void * pcm_dma_addr(void *addr)
{
if (addr != NULL)
addr = UNCACHED_ADDR(addr);
return addr;
}
#endif
/****************************************************************************
** Recording DMA transfer

View file

@ -46,8 +46,9 @@ int button_read_device(void)
/* This is a keypad using C4-C6 as columns and B0-B2 as rows */
GPIOC_PIN(4) = (1<<4);
asm volatile("nop\nnop\nnop\nnop\nnop\n"); /* small delay */
/* C4B0 is unused */
(void)GPIOB_PIN(0); /* C4B0 is unused */
if (GPIOB_PIN(1))
result |= BUTTON_VOL_UP;
@ -58,6 +59,7 @@ int button_read_device(void)
GPIOC_PIN(4) = 0x00;
GPIOC_PIN(5) = (1<<5);
asm volatile("nop\nnop\nnop\nnop\nnop\n"); /* small delay */
if (GPIOB_PIN(0))
result |= BUTTON_LEFT;
@ -71,6 +73,7 @@ int button_read_device(void)
GPIOC_PIN(5) = 0x00;
GPIOC_PIN(6) = (1<<6);
asm volatile("nop\nnop\nnop\nnop\nnop\n"); /* small delay */
if (GPIOB_PIN(0))
result |= BUTTON_DOWN;

View file

@ -150,7 +150,7 @@ bool button_hold(void)
static void button_delay(void)
{
int i = 24;
int i = 50;
while(i--) asm volatile ("nop\n");
}

View file

@ -28,6 +28,9 @@
#include "clock-target.h"
#include "fmradio_i2c.h"
#include "button-target.h"
#ifndef BOOTLOADER
#include "mmu-arm.h"
#endif
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
@ -214,6 +217,26 @@ static void sdram_init(void)
MPMC_DYNAMIC_CONFIG_0 |= (1<<19); /* buffer enable */
}
#else
void memory_init(void)
{
ttb_init();
/* map every region to itself, uncached */
map_section(0, 0, 4096, CACHE_NONE);
/* IRAM */
map_section(0, IRAM_ORIG, 1, CACHE_ALL);
map_section(0, UNCACHED_ADDR(IRAM_ORIG), 1, CACHE_NONE);
/* DRAM */
map_section(0x30000000, DRAM_ORIG, MEMORYSIZE, CACHE_ALL);
map_section(0x30000000, UNCACHED_ADDR(DRAM_ORIG), MEMORYSIZE, CACHE_NONE);
/* map 1st mbyte of DRAM at 0x0 to have exception vectors available */
map_section(0x30000000, 0, 1, CACHE_ALL);
enable_mmu();
}
#endif
void system_init(void)
@ -226,6 +249,9 @@ void system_init(void)
CCU_SRL = CCU_SRL_MAGIC_NUMBER;
CCU_SRC = CCU_SRL = 0;
CCU_SCON = 1; /* AHB master's priority configuration :
TIC (Test Interface Controller) > DMA > USB > IDE > ARM */
CGU_PROC = 0; /* fclk 24 MHz */
CGU_PERI &= ~0x7f; /* pclk 24 MHz */
@ -244,10 +270,8 @@ void system_init(void)
asm volatile(
"mov r0, #0 \n"
"mcr p15, 0, r0, c7, c7 \n" /* invalidate icache & dcache */
"mrc p15, 0, r0, c1, c0 \n" /* control register */
"bic r0, r0, #3<<30 \n" /* clears bus bits & sets fastbus */
"orr r0, r0, #1<<12 \n" /* enable icache */
"bic r0, r0, #3<<30 \n" /* clears bus bits : sets fastbus */
"mcr p15, 0, r0, c1, c0 \n"
: : : "r0" );

View file

@ -25,4 +25,10 @@
#include "clock-target.h" /* CPUFREQ_* are defined here */
#ifdef BOOTLOADER
#define UNCACHED_ADDR(a) (a)
#else
#define UNCACHED_ADDR(a) (a + 0x10000000)
#endif
#endif /* SYSTEM_TARGET_H */

View file

@ -58,16 +58,8 @@ newstart:
msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
#if CONFIG_CPU==AS3525 && !defined(BOOTLOADER)
/* relocate vectors */
mov r1, #0 @ destination
ldr r2, =_vectorscopy @ source
ldr r3, =_vectorsend @ end
1: ldr r0, [r2], #4
str r0, [r1], #4
cmp r1, r3
bne 1b
/* Setup MMU : has to be done before accessing IRAM ! */
bl memory_init
/* Zero out IBSS */
ldr r2, =_iedata

12
tools/configure vendored
View file

@ -259,7 +259,7 @@ arm7tdmicc () {
arm9tdmicc () {
prefixtools arm-elf-
GCCOPTS="$CCOPTS -mcpu=arm9tdmi"
if test "$modelname" != "gigabeatf"; then
if test "$modelname" != "gigabeatf" -a "$t_manufacturer" != "as3525"; then
GCCOPTS="$GCCOPTS -mlong-calls"
fi
GCCOPTIMIZE="-fomit-frame-pointer"
@ -1734,7 +1734,6 @@ fi
modelname="clip"
target="-DSANSA_CLIP"
memory=2
arm9tdmicc
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$bmp2rb_mono"
tool="$rootdir/tools/scramble -add=clip"
@ -1747,6 +1746,7 @@ fi
t_cpu="arm"
t_manufacturer="as3525"
t_model="sansa-clip"
arm9tdmicc
;;
@ -1755,7 +1755,6 @@ fi
modelname="e200v2"
target="-DSANSA_E200V2"
memory=8
arm9tdmicc
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
tool="$rootdir/tools/scramble -add=e2v2"
@ -1768,6 +1767,7 @@ fi
t_cpu="arm"
t_manufacturer="as3525"
t_model="sansa-e200v2"
arm9tdmicc
;;
@ -1776,7 +1776,6 @@ fi
modelname="m200v4"
target="-DSANSA_M200V4"
memory=2
arm9tdmicc
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$bmp2rb_mono"
tool="$rootdir/tools/scramble -add=m2v4"
@ -1789,6 +1788,7 @@ fi
t_cpu="arm"
t_manufacturer="as3525"
t_model="sansa-m200v4"
arm9tdmicc
;;
@ -1797,7 +1797,6 @@ fi
modelname="fuze"
target="-DSANSA_FUZE"
memory=8
arm9tdmicc
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
tool="$rootdir/tools/scramble -add=fuze"
@ -1810,6 +1809,7 @@ fi
t_cpu="arm"
t_manufacturer="as3525"
t_model="sansa-fuze"
arm9tdmicc
;;
@ -1818,7 +1818,6 @@ fi
modelname="c200v2"
target="-DSANSA_C200V2"
memory=2 # as per OF diagnosis mode
arm9tdmicc
bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
tool="$rootdir/tools/scramble -add=c2v2"
@ -1834,6 +1833,7 @@ fi
t_cpu="arm"
t_manufacturer="as3525"
t_model="sansa-c200v2"
arm9tdmicc
;;
60|Clipv2|clipv2)