M:Robe 500/M66591: Add support for full-speed USB transfers, and fix the UART interrupt clearing.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22095 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Karl Kurbjun 2009-08-01 15:41:40 +00:00
parent 5c882be608
commit f3298a4612
2 changed files with 43 additions and 20 deletions

View file

@ -41,6 +41,11 @@
/******************************************************************************* /*******************************************************************************
* These are the driver specific defines. * These are the driver specific defines.
******************************************************************************/ ******************************************************************************/
/* This define is primarily intended for testing, using HISPEED all the time
* should be acceptable since the defice should down-train if the host does not
* support HISPEED.
*/
#define HISPEED #define HISPEED
/* Right now sending blocks till the full transfer has completed, this needs to /* Right now sending blocks till the full transfer has completed, this needs to
@ -134,24 +139,43 @@ static int pipe_buffer_size (int pipe) {
} }
#endif #endif
/* This function returns the maximum packet size for each endpoint/pipe. It is /* This function returns the maximum packet size for each endpoint/pipe. The
* Currently only setup to support Highspeed mode. * max packet size is dependent on whether the device is running High or Full
* speed.
*/ */
static int pipe_maxpack_size (int pipe) { static int pipe_maxpack_size (int pipe) {
switch(pipe) { if( (M66591_HSFS & 0xFF) == 0x03 ) { /* Device is running Highspeed */
case 0: switch(pipe) {
/* DCP max packet size is configurable */ case 0:
return M66591_DCP_MXPKSZ; /* DCP max packet size is configurable */
case 1: return M66591_DCP_MXPKSZ;
case 2: case 1:
case 3: case 2:
case 4: case 3:
return 512; case 4:
case 5: return 512;
case 6: case 5:
return 64; case 6:
default: return 64;
return 0; default:
return 0;
}
} else { /* Device is running Full speed */
switch(pipe) {
case 0:
/* DCP max packet size is configurable */
return M66591_DCP_MXPKSZ;
case 1:
case 2:
case 3:
case 4:
return 64;
case 5:
case 6:
return 64;
default:
return 0;
}
} }
} }
@ -461,7 +485,7 @@ void USB_DEVICE(void) {
case CTRL_RTDS: case CTRL_RTDS:
case CTRL_WTDS: case CTRL_WTDS:
case CTRL_WTND: case CTRL_WTND:
// If data is not valid stop /* If data is not valid stop */
if(!(M66591_INTSTAT_MAIN & (1<<3)) ) { if(!(M66591_INTSTAT_MAIN & (1<<3)) ) {
logf("mxx: CTRT interrupt but VALID is false"); logf("mxx: CTRT interrupt but VALID is false");
break; break;
@ -471,7 +495,7 @@ void USB_DEVICE(void) {
case CTRL_RTSS: case CTRL_RTSS:
case CTRL_WTSS: case CTRL_WTSS:
pipe_handshake(0, PIPE_SHAKE_BUF); pipe_handshake(0, PIPE_SHAKE_BUF);
M66591_DCPCTRL |= 1<<2; // Set CCPL M66591_DCPCTRL |= 1<<2; /* Set CCPL */
break; break;
default: default:
logf("mxx: CTRT with unknown CTSQ"); logf("mxx: CTRT with unknown CTSQ");

View file

@ -156,6 +156,7 @@ int uart1_gets_queue(char *str, int size)
/* UART1 receive/transmit interupt handler */ /* UART1 receive/transmit interupt handler */
void UART1(void) void UART1(void)
{ {
IO_INTC_IRQ0 = INTR_IRQ0_UART1; /* Clear the interrupt first */
while (IO_UART1_RFCR & 0x3f) while (IO_UART1_RFCR & 0x3f)
{ {
if (uart1_receive_count > RECEIVE_RING_SIZE) if (uart1_receive_count > RECEIVE_RING_SIZE)
@ -176,6 +177,4 @@ void UART1(void)
IO_UART1_DTRR=uart1_send_buffer_ring[uart1_send_read++]; IO_UART1_DTRR=uart1_send_buffer_ring[uart1_send_read++];
uart1_send_count--; uart1_send_count--;
} }
IO_INTC_IRQ0 = INTR_IRQ0_UART1;
} }