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iPod Classic: fix s5l8702 cache line length.

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Use 32 bytes for cache line length (arm926ej-s), this prevents
misalignments of ATA storage buffer which in some builds could
cause weird faults.

Change-Id: I88dc595d251315620ec49b0251ddc039ff47181e
Reviewed-on: http://gerrit.rockbox.org/1031
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
This commit is contained in:
Cástor Muñoz 2014-11-10 01:50:19 +01:00 • committed by Marcin Bukat
parent bcca111438
commit edb0c6c92f
3 changed files with 9 additions and 4 deletions
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6
firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c Executable file → Normal file
View file

@ -48,8 +48,8 @@
/** static, private data **/
static uint8_t ceata_taskfile[16] __attribute__((aligned(16)));
static uint16_t ata_identify_data[0x100] __attribute__((aligned(16)));
static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR;
static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR;
static bool ceata;
static bool ata_swap;
static bool ata_lba48;
@ -68,7 +68,7 @@ static struct semaphore mmc_wakeup;
static struct semaphore mmc_comp_wakeup;
static int spinup_time = 0;
static int dma_mode = 0;
static char aligned_buffer[SECTOR_SIZE] __attribute__((aligned(0x10)));
static char aligned_buffer[SECTOR_SIZE] STORAGE_ALIGN_ATTR;
#ifdef ATA_HAVE_BBT