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jz4760: Support dynamic reclocking!

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default/low speed is 192 MHz, Max is 576

Downclock PCLK/MCLK/etc to 96MHz to save a bit of juice

Honestly the high speed could be dialed down to, eg 384
as this thing is so bloody fast..

Change-Id: Ie65597c74290f1603e65f69dae8e75b59c8ba0b4
This commit is contained in:
Solomon Peachy 2020-08-07 00:44:55 -04:00
parent 62146ed735
commit eb0e41c1cc
3 changed files with 66 additions and 25 deletions
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16
firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
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@ -633,14 +633,23 @@ static inline unsigned int jz_sd_calc_clkrt(const int drive, unsigned int rate)
return clkrt;
}
static inline void cpm_select_msc_clk(unsigned int rate)
#ifndef HAVE_ADJUSTABLE_CPU_FREQ
#define cpu_frequency __cpm_get_pllout2()
#endif
void cpm_select_msc_clk(void)
{
unsigned int div = __cpm_get_pllout2() / rate;
unsigned int div = cpu_frequency / SD_CLOCK_FAST;
if (div == 0)
div = 1;
if (div == __cpm_get_mscdiv())
return;
REG_CPM_MSCCDR = MSCCDR_MCS | (div - 1);
DEBUG("MSCCLK == %x\n", REG_CPM_MSCCDR);
__cpm_enable_pll_change();
}
/* Set the MMC clock frequency */
@ -651,9 +660,8 @@ static void jz_sd_set_clock(const int drive, unsigned int rate)
jz_sd_stop_clock(drive);
/* select clock source from CPM */
cpm_select_msc_clk(rate);
cpm_select_msc_clk();
__cpm_enable_pll_change();
clkrt = jz_sd_calc_clkrt(drive, rate);
REG_MSC_CLKRT(MSC_CHN(drive)) = clkrt;