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imx233: generate register headers using headergen_v2 and update code for it

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NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.

The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
  BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
  BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
  its equivalent for BF_WR(reg_SET, ...)

I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".

Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml

Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
This commit is contained in:
Amaury Pouly 2016-05-24 20:29:56 +01:00
parent 28920ec5cc
commit eac1ca22bd
306 changed files with 66936 additions and 42319 deletions
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57
firmware/target/arm/imx233/power-imx233.h
View file

@ -25,57 +25,8 @@
#include "system-target.h"
#include "cpu.h"
#include "regs/regs-power.h"
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__10mA (1 << 0)
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__20mA (1 << 1)
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__50mA (1 << 2)
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__100mA (1 << 3)
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__200mA (1 << 4)
#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__400mA (1 << 5)
#define BV_POWER_CHARGE_BATTCHRG_I__10mA (1 << 0)
#define BV_POWER_CHARGE_BATTCHRG_I__20mA (1 << 1)
#define BV_POWER_CHARGE_BATTCHRG_I__50mA (1 << 2)
#define BV_POWER_CHARGE_BATTCHRG_I__100mA (1 << 3)
#define BV_POWER_CHARGE_BATTCHRG_I__200mA (1 << 4)
#define BV_POWER_CHARGE_BATTCHRG_I__400mA (1 << 5)
#define BV_POWER_CHARGE_STOP_ILIMIT__10mA (1 << 0)
#define BV_POWER_CHARGE_STOP_ILIMIT__20mA (1 << 1)
#define BV_POWER_CHARGE_STOP_ILIMIT__50mA (1 << 2)
#define BV_POWER_CHARGE_STOP_ILIMIT__100mA (1 << 3)
#if IMX233_SUBTARGET >= 3700
#define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */
#define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */
#define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */
#define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */
#define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */
#define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */
#define HW_POWER_VDDMEMCTRL__TRG_STEP 50 /* mV */
#define HW_POWER_VDDMEMCTRL__TRG_MIN 1700 /* mV */
#else
/* don't use the full available range because of the weird encodings for
* extreme values which are useless anyway */
#define HW_POWER_VDDDCTRL__TRG_STEP 32 /* mV */
#define HW_POWER_VDDDCTRL__TRG_MIN 1280 /* mV */
#define HW_POWER_VDDDCTRL__TRG_OFF 8 /* below 8, the register value doesn't encode linearly */
#endif
#define BV_POWER_MISC_FREQSEL__RES 0
#define BV_POWER_MISC_FREQSEL__20MHz 1
#define BV_POWER_MISC_FREQSEL__24MHz 2
#define BV_POWER_MISC_FREQSEL__19p2MHz 3
#define BV_POWER_MISC_FREQSEL__14p4MHz 4
#define BV_POWER_MISC_FREQSEL__18MHz 5
#define BV_POWER_MISC_FREQSEL__21p6MHz 6
#define BV_POWER_MISC_FREQSEL__17p28MHz 7
#include "regs/power.h"
#include "regs/digctl.h"
void imx233_power_init(void);
@ -114,8 +65,8 @@ void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg,
static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq)
{
if(pll)
BF_WR(POWER_MISC, FREQSEL, freq);
BF_WR(POWER_MISC, SEL_PLLCLK, pll);
BF_WR(POWER_MISC, FREQSEL(freq));
BF_WR(POWER_MISC, SEL_PLLCLK(pll));
}
#endif