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imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
This commit is contained in:
parent
28920ec5cc
commit
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306 changed files with 66936 additions and 42319 deletions
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@ -22,6 +22,10 @@
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#include "pcm_sampr.h"
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#include "string.h"
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#include "regs/audioin.h"
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/* some audioout registers impact audioin */
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#include "regs/audioout.h"
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/* values in half-dB, one for each setting */
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static int audioin_vol[2][4]; /* 0=left, 1=right */
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static int audioin_select[2]; /* idem */
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@ -87,35 +91,35 @@ static void apply_config(void)
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{
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/* take lowest microphone gain to get back into the -100..22 range
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* achievable with mux+adc.*/
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/* from 52.5 dB and beyond: 40dB gain */
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if(vol_l > 52 * 2)
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{
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BF_WR_V(AUDIOIN_MICLINE, MIC_GAIN, 40dB);
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(40dB));
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vol_l -= 40 * 2;
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}
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/* from 42.5 dB to 52dB: 30dB gain */
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else if(vol_l > 42 * 2)
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{
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BF_WR_V(AUDIOIN_MICLINE, MIC_GAIN, 30dB);
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(30dB));
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vol_l -= 30 * 2;
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}
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/* from 22.5 dB to 42dB: 20dB gain */
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else if(vol_l > 22 * 2)
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{
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BF_WR_V(AUDIOIN_MICLINE, MIC_GAIN, 20dB);
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(20dB));
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vol_l -= 20 * 2;
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}
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/* otherwise 0dB gain */
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else
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BF_WR_V(AUDIOIN_MICLINE, MIC_GAIN, 0dB);
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BF_WR(AUDIOIN_MICLINE, MIC_GAIN_V(0dB));
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}
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/* max is 22dB */
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vol_l = MIN(vol_l, 44);
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vol_r = MIN(vol_r, 44);
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/* we use the mux volume to reach the volume or higher with 1.5dB steps
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* and then we use the ADC to go below 0dB or to obtain 0.5dB accuracy */
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int mux_vol_l = MAX(0, (vol_l + 2) / 3); /* 1.5dB = 3 * 0.5dB */
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int mux_vol_r = MAX(0, (vol_r + 2) / 3);
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#if IMX233_SUBTARGET >= 3700
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@ -123,7 +127,7 @@ static void apply_config(void)
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#else
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unsigned adc_zcd = 0;
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#endif
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HW_AUDIOIN_ADCVOL = adc_zcd | BF_OR4(AUDIOIN_ADCVOL, SELECT_LEFT(select_l),
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HW_AUDIOIN_ADCVOL = adc_zcd | BF_OR(AUDIOIN_ADCVOL, SELECT_LEFT(select_l),
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SELECT_RIGHT(select_r), GAIN_LEFT(mux_vol_l), GAIN_RIGHT(mux_vol_r));
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vol_l -= mux_vol_l * 3; /* mux vol is in 1.5dB = 3 * 0.5dB steps */
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@ -133,7 +137,7 @@ static void apply_config(void)
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/* unmute, enable zero cross and set volume.
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* 0xfe is -0.5dB */
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HW_AUDIOIN_ADCVOLUME = BF_OR3(AUDIOIN_ADCVOLUME, EN_ZCD(1),
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BF_WR_ALL(AUDIOIN_ADCVOLUME, EN_ZCD(1),
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VOLUME_LEFT(0xff + vol_l), VOLUME_RIGHT(0xff + vol_r));
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}
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@ -153,12 +157,12 @@ void imx233_audioin_enable_mic(bool enable)
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{
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if(enable)
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{
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BF_WR_V(AUDIOIN_MICLINE, MIC_RESISTOR, 2KOhm);
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BF_WR(AUDIOIN_MICLINE, MIC_BIAS, 4);
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BF_WR(AUDIOIN_MICLINE, MIC_SELECT, 1);
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BF_WR(AUDIOIN_MICLINE, MIC_RESISTOR_V(2KOhm));
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BF_WR(AUDIOIN_MICLINE, MIC_BIAS(4));
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BF_WR(AUDIOIN_MICLINE, MIC_SELECT(1));
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}
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else
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BF_WR_V(AUDIOIN_MICLINE, MIC_RESISTOR, Off);
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BF_WR(AUDIOIN_MICLINE, MIC_RESISTOR_V(Off));
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}
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void imx233_audioin_set_freq(int fsel)
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@ -185,7 +189,7 @@ void imx233_audioin_set_freq(int fsel)
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HW_HAVE_96_([HW_FREQ_96] = { 0x2, 0x0, 0xf, 0x13ff },)
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};
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HW_AUDIOIN_ADCSRR = BF_OR4(AUDIOIN_ADCSRR,
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BF_WR_ALL(AUDIOIN_ADCSRR,
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SRC_FRAC(dacssr[fsel].src_frac), SRC_INT(dacssr[fsel].src_int),
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SRC_HOLD(dacssr[fsel].src_hold), BASEMULT(dacssr[fsel].base_mult));
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}
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