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Bring consistency to pcm implementation and samplerate handling. Less low-level duplication. A small test_sampr fix so it works on coldfire again.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19400 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-12-12 11:01:07 +00:00
parent 0ad97d13fc
commit e69d567d9e
37 changed files with 316 additions and 449 deletions
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11
firmware/target/arm/as3525/pcm-as3525.c
View file

@ -138,8 +138,10 @@ void pcm_postinit(void)
pcm_apply_settings();
}
void pcm_set_frequency(unsigned int frequency)
void pcm_dma_apply_settings(void)
{
unsigned long frequency = pcm_sampr;
const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1;
if(divider < 0 || divider > 511)
panicf("unsupported frequency %d", frequency);
@ -147,13 +149,6 @@ void pcm_set_frequency(unsigned int frequency)
CGU_AUDIO &= ~(((511 ^ divider) << 2) /* I2SOUT */
/*| ((511 ^ divider) << 14) */ /* I2SIN */
);
pcm_curr_sampr = frequency;
}
void pcm_apply_settings(void)
{
pcm_set_frequency(HW_SAMPR_DEFAULT);
}
size_t pcm_get_bytes_waiting(void)

18
firmware/target/arm/audio-pp.c
View file

@ -40,6 +40,23 @@ void audio_input_mux(int source, unsigned flags)
static bool last_recording = false;
#endif
#if defined(IPOD_COLOR) || defined (IPOD_4G)
/* The usual magic from IPL - I'm guessing this configures the headphone
socket to be input or output. */
if (recording && source != AUDIO_SRC_PLAYBACK)
{
/* input */
GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
}
else
{
/* output */
GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
}
#endif /* IPOD_COLOR || IPOD_4G */
switch (source)
{
default: /* playback - no recording */
@ -109,4 +126,3 @@ void audio_input_mux(int source, unsigned flags)
last_source = source;
} /* audio_input_mux */
#endif /* INPUT_SRC_CAPS != 0 */

14
firmware/target/arm/i2s-pp.c
View file

@ -25,28 +25,22 @@
* KIND, either express or implied.
*
****************************************************************************/
#include "system.h"
#include "cpu.h"
#include "i2s.h"
/* TODO: Add in PP5002 defs */
#if CONFIG_CPU == PP5002
void i2s_reset(void)
{
/* I2S device reset */
DEV_RS |= 0x80;
DEV_RS &= ~0x80;
DEV_RS |= DEV_I2S;
DEV_RS &= ~DEV_I2S;
/* I2S controller enable */
IISCONFIG |= 1;
/* BIT.FORMAT [11:10] = I2S (default) */
/* BIT.SIZE [9:8] = 24bit */
/* FIFO.FORMAT = 24 bit LSB */
IISCONFIG |= IIS_ENABLE;
/* reset DAC and ADC fifo */
IISFIFO_CFG |= 0x30000;
IISFIFO_CFG |= IIS_RXCLR | IIS_TXCLR;
}
#else /* PP502X */

75
firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
View file

@ -37,9 +37,6 @@ struct dma_data
int state;
};
static unsigned long pcm_freq; /* 44.1 is default */
static int sr_ctrl;
static struct dma_data dma_play_data =
{
/* Initialize to a locked, stopped state */
@ -67,15 +64,6 @@ void pcm_play_unlock(void)
}
}
static void _pcm_apply_settings(void)
{
if (pcm_freq != pcm_curr_sampr)
{
pcm_curr_sampr = pcm_freq;
audiohw_set_frequency(sr_ctrl);
}
}
static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
{
register pcm_more_callback_type get_more;
@ -109,19 +97,9 @@ static void __attribute__((interrupt("IRQ"))) SSI1_HANDLER(void)
pcm_play_dma_stopped_callback();
}
void pcm_apply_settings(void)
void pcm_dma_apply_settings(void)
{
pcm_play_lock();
#ifdef HAVE_RECORDING
pcm_rec_lock();
#endif
_pcm_apply_settings();
#ifdef HAVE_RECORDING
pcm_rec_unlock();
#endif
pcm_play_unlock();
audiohw_set_frequency(pcm_fsel);
}
void pcm_play_dma_init(void)
@ -214,7 +192,6 @@ void pcm_play_dma_init(void)
/* Enable SSI2 (codec clock) */
SSI_SCR2 |= SSI_SCR_SSIEN;
pcm_set_frequency(HW_SAMPR_DEFAULT);
audiohw_init();
}
@ -230,7 +207,7 @@ static void play_start_pcm(void)
SSI_SCR1 &= ~SSI_SCR_TE;
/* Apply new settings */
_pcm_apply_settings();
pcm_apply_settings();
/* Enable interrupt on unlock */
dma_play_data.state = 1;
@ -296,52 +273,6 @@ void pcm_play_dma_pause(bool pause)
}
}
/* Set the pcm frequency hardware will use when play is next started or
when pcm_apply_settings is called. Do not apply the setting to the
hardware here but simply cache it. */
void pcm_set_frequency(unsigned int frequency)
{
int index;
switch (frequency)
{
case SAMPR_48:
index = HW_FREQ_48;
break;
case SAMPR_44:
index = HW_FREQ_44;
break;
case SAMPR_32:
index = HW_FREQ_32;
break;
case SAMPR_24:
index = HW_FREQ_24;
break;
case SAMPR_22:
index = HW_FREQ_22;
break;
case SAMPR_16:
index = HW_FREQ_16;
break;
case SAMPR_12:
index = HW_FREQ_12;
break;
case SAMPR_11:
index = HW_FREQ_11;
break;
case SAMPR_8:
index = HW_FREQ_8;
break;
default:
/* Invalid = default */
frequency = HW_SAMPR_DEFAULT;
index = HW_FREQ_DEFAULT;
}
pcm_freq = frequency;
sr_ctrl = index;
}
/* Return the number of bytes waiting - full L-R sample pairs only */
size_t pcm_get_bytes_waiting(void)
{

56
firmware/target/arm/pcm-pp.c
View file

@ -25,10 +25,7 @@
#include "audio.h"
#include "sound.h"
#include "pcm.h"
#ifdef HAVE_WM8751
#define MROBE100_44100HZ (0x40|(0x11 << 1)|1)
#endif
#include "pcm_sampr.h"
/** DMA **/
@ -87,36 +84,9 @@ static struct dma_data dma_play_data SHAREDBSS_ATTR =
.state = 0
};
static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
#ifdef HAVE_WM8751
/* Samplerate control for audio codec */
static int sr_ctrl = MROBE100_44100HZ;
#endif
void pcm_set_frequency(unsigned int frequency)
void pcm_dma_apply_settings(void)
{
#if defined(HAVE_WM8731) || defined(HAVE_WM8721)
pcm_freq = frequency;
#else
(void)frequency;
pcm_freq = HW_SAMPR_DEFAULT;
#endif
#ifdef HAVE_WM8751
sr_ctrl = MROBE100_44100HZ;
#endif
}
void pcm_apply_settings(void)
{
#ifdef HAVE_WM8751
audiohw_set_frequency(sr_ctrl);
#endif
#if defined(HAVE_WM8711) || defined(HAVE_WM8721) \
|| defined(HAVE_WM8731)
audiohw_set_sample_rate(pcm_freq);
#endif
pcm_curr_sampr = pcm_freq;
audiohw_set_frequency(pcm_fsel);
}
/* ASM optimised FIQ handler. Checks for the minimum allowed loop cycles by
@ -330,9 +300,7 @@ static void play_stop_pcm(void)
IIS_IRQTX_REG &= ~IIS_IRQTX;
/* Wait for FIFO to empty */
#ifdef CPU_PP502x
while (IIS_TX_FREE_COUNT < 16);
#endif
while (!IIS_TX_IS_EMPTY);
dma_play_data.state = 0;
}
@ -397,8 +365,6 @@ void pcm_play_dma_init(void)
: [iiscfg]"r"(iiscfg), [dmapd]"r"(dmapd)
: "r2");
pcm_set_frequency(SAMPR_44);
/* Initialize default register values. */
audiohw_init();
@ -620,24 +586,10 @@ void pcm_rec_dma_start(void *addr, size_t size)
void pcm_rec_dma_close(void)
{
pcm_rec_dma_stop();
#if defined(IPOD_COLOR) || defined (IPOD_4G)
/* The usual magic from IPL - I'm guessing this configures the headphone
socket to be input or output - in this case, output. */
GPIO_SET_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
#endif
} /* pcm_close_recording */
void pcm_rec_dma_init(void)
{
#if defined(IPOD_COLOR) || defined (IPOD_4G)
/* The usual magic from IPL - I'm guessing this configures the headphone
socket to be input or output - in this case, input. */
GPIO_CLEAR_BITWISE(GPIOI_OUTPUT_VAL, 0x40);
GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_VAL, 0x04);
#endif
pcm_rec_dma_stop();
} /* pcm_init */

13
firmware/target/arm/pcm-telechips.c
View file

@ -58,7 +58,7 @@ struct dma_data dma_play_data SHAREDBSS_ATTR =
.state = 0
};
static unsigned long pcm_freq SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
static unsigned long pcm_sampr SHAREDDATA_ATTR = HW_SAMPR_DEFAULT; /* 44.1 is default */
void pcm_postinit(void)
{
@ -102,8 +102,6 @@ void pcm_play_dma_init(void)
/* Set DAI interrupts as FIQs */
IRQSEL = ~(DAI_RX_IRQ_MASK | DAI_TX_IRQ_MASK);
pcm_set_frequency(SAMPR_44);
/* Initialize default register values. */
audiohw_init();
@ -113,15 +111,8 @@ void pcm_play_dma_init(void)
#endif
}
void pcm_apply_settings(void)
void pcm_dma_apply_settings(void)
{
pcm_curr_sampr = pcm_freq;
}
void pcm_set_frequency(unsigned int frequency)
{
(void) frequency;
pcm_freq = HW_SAMPR_DEFAULT;
}
static void play_start_pcm(void)

13
firmware/target/arm/pnx0101/pcm-pnx0101.c
View file

@ -27,7 +27,7 @@
short __attribute__((section(".dmabuf"))) dma_buf_left[DMA_BUF_SAMPLES];
short __attribute__((section(".dmabuf"))) dma_buf_right[DMA_BUF_SAMPLES];
static int pcm_freq = HW_SAMPR_DEFAULT; /* 44.1 is default */
static int pcm_sampr = HW_SAMPR_DEFAULT; /* 44.1 is default */
unsigned short* p IBSS_ATTR;
size_t p_size IBSS_ATTR;
@ -147,8 +147,6 @@ void pcm_init(void)
{
int i;
pcm_set_frequency(HW_SAMPR_DEFAULT);
memset(dma_buf_left, 0, sizeof(dma_buf_left));
memset(dma_buf_right, 0, sizeof(dma_buf_right));
@ -193,15 +191,8 @@ void pcm_postinit(void)
pcm_apply_settings();
}
void pcm_set_frequency(unsigned int frequency)
void pcm_dma_apply_settings(void)
{
(void)frequency;
pcm_freq = HW_SAMPR_DEFAULT;
}
void pcm_apply_settings(void)
{
pcm_curr_sampr = pcm_freq;
}
size_t pcm_get_bytes_waiting(void)

59
firmware/target/arm/s3c2440/gigabeat-fx/pcm-meg-fx.c
View file

@ -26,12 +26,6 @@
#include "sound.h"
#include "file.h"
/* All exact rates for 16.9344MHz clock */
#define GIGABEAT_11025HZ (0x19 << 1)
#define GIGABEAT_22050HZ (0x1b << 1)
#define GIGABEAT_44100HZ (0x11 << 1)
#define GIGABEAT_88200HZ (0x1f << 1)
/* PCM interrupt routine lockout */
static struct
{
@ -43,11 +37,6 @@ static struct
.state = 0,
};
/* Last samplerate set by pcm_set_frequency */
static unsigned long pcm_freq = 0; /* 44.1 is default */
/* Samplerate control for audio codec */
static int sr_ctrl = 0;
#define FIFO_COUNT ((IISFCON >> 6) & 0x3F)
/* Setup for the DMA controller */
@ -57,22 +46,6 @@ static int sr_ctrl = 0;
/* Get more data from the callback and top off the FIFO */
void fiq_handler(void) __attribute__((interrupt ("FIQ")));
static void _pcm_apply_settings(void)
{
if (pcm_freq != pcm_curr_sampr)
{
pcm_curr_sampr = pcm_freq;
audiohw_set_frequency(sr_ctrl);
}
}
void pcm_apply_settings(void)
{
int status = disable_fiq_save();
_pcm_apply_settings();
restore_fiq(status);
}
/* Mask the DMA interrupt */
void pcm_play_lock(void)
{
@ -89,8 +62,6 @@ void pcm_play_unlock(void)
void pcm_play_dma_init(void)
{
pcm_set_frequency(SAMPR_44);
/* There seem to be problems when changing the IIS interface configuration
* when a clock is not present.
*/
@ -128,13 +99,18 @@ void pcm_postinit(void)
pcm_apply_settings();
}
void pcm_dma_apply_settings(void)
{
audiohw_set_frequency(pcm_fsel);
}
/* Connect the DMA and start filling the FIFO */
static void play_start_pcm(void)
{
/* clear pending DMA interrupt */
SRCPND = DMA2_MASK;
_pcm_apply_settings();
pcm_apply_settings();
/* Flush any pending writes */
clean_dcache_range((void*)DISRC2, (DCON2 & 0xFFFFF) * 2);
@ -272,29 +248,6 @@ void fiq_handler(void)
}
}
void pcm_set_frequency(unsigned int frequency)
{
switch(frequency)
{
case SAMPR_11:
sr_ctrl = GIGABEAT_11025HZ;
break;
case SAMPR_22:
sr_ctrl = GIGABEAT_22050HZ;
break;
default:
frequency = SAMPR_44;
case SAMPR_44:
sr_ctrl = GIGABEAT_44100HZ;
break;
case SAMPR_88:
sr_ctrl = GIGABEAT_88200HZ;
break;
}
pcm_freq = frequency;
}
size_t pcm_get_bytes_waiting(void)
{
/* lie a little and only return full pairs */

33
firmware/target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c
View file

@ -28,6 +28,8 @@
#include "audiohw.h"
#include "dsp-target.h"
static int pcm_fsel = HW_FREQ_DEFAULT;
void pcm_play_dma_init(void)
{
IO_CLK_O1DIV = 3;
@ -37,7 +39,7 @@ void pcm_play_dma_init(void)
audiohw_init();
audiohw_set_frequency(1);
audiohw_set_frequency(HW_FREQ_DEFAULT);
/* init DSP */
dsp_init();
@ -46,42 +48,21 @@ void pcm_play_dma_init(void)
void pcm_postinit(void)
{
audiohw_postinit();
pcm_apply_settings();
/* wake DSP */
dsp_wake();
}
/* set frequency used by the audio hardware */
void pcm_set_frequency(unsigned int frequency)
{
int index;
switch(frequency)
{
case SAMPR_11:
case SAMPR_22:
index = 0;
break;
default:
case SAMPR_44:
index = 1;
break;
case SAMPR_88:
index = 2;
break;
}
audiohw_set_frequency(index);
} /* pcm_set_frequency */
const void * pcm_play_dma_get_peak_buffer(int *count)
{
(void) count;
return 0;
}
void pcm_apply_settings(void)
void pcm_dma_apply_settings(void)
{
audiohw_set_frequency(pcm_fsel);
}
void pcm_play_dma_start(const void *addr, size_t size)

8
firmware/target/arm/tms320dm320/mrobe-500/pcm-mr500.c Executable file → Normal file
View file

@ -41,14 +41,8 @@ void pcm_play_dma_init(void)
}
void pcm_apply_settings(void)
void pcm_dma_apply_settings(void)
{
}
void pcm_set_frequency(unsigned int frequency)
{
(void) frequency;
}
void pcm_play_dma_start(const void *addr, size_t size)