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imx233/fuze+: fix ctr0 to use a fresh stack and update firmware linker script
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30523 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
3d46b080fd
commit
ddb96f1b65
2 changed files with 18 additions and 16 deletions
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@ -9,9 +9,6 @@ STARTUP(target/arm/imx233/crt0.o)
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#define PLUGINSIZE PLUGIN_BUFFER_SIZE
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#define PLUGINSIZE PLUGIN_BUFFER_SIZE
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#define CODECSIZE CODEC_SIZE
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#define CODECSIZE CODEC_SIZE
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#define DRAMORIG DRAM_ORIG
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#define IRAMORIG IRAM_ORIG
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#define IRAMSIZE IRAM_SIZE
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#define IRAMSIZE IRAM_SIZE
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#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE)
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#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE)
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@ -28,26 +25,24 @@ STARTUP(target/arm/imx233/crt0.o)
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MEMORY
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MEMORY
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{
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{
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAMSIZE
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DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
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DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
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UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
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UDRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
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}
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}
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SECTIONS
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SECTIONS
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{
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{
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loadaddress = UNCACHED_DRAM_ADDR;
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_loadaddress = UNCACHED_DRAM_ADDR;
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.text :
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.text :
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{
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{
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*(.text*)
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*(.text*)
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} > DRAM
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.data :
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{
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*(.data*)
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*(.data*)
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*(.rodata*)
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*(.rodata*)
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_dataend = . ;
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} > DRAM
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} > DRAM
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.iram :
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.itext :
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{
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{
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_iramstart = .; // always 0
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_iramstart = .; // always 0
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*(.vectors)
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*(.vectors)
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@ -59,7 +54,7 @@ SECTIONS
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_iramend = .;
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_iramend = .;
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} > IRAM AT> DRAM
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} > IRAM AT> DRAM
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_iramcopy = LOADADDR(.iram);
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_iramcopy = LOADADDR(.itext);
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.ibss (NOLOAD) :
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.ibss (NOLOAD) :
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{
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{
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@ -75,6 +70,7 @@ SECTIONS
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. = ALIGN(4);
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. = ALIGN(4);
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_initstart = .;
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_initstart = .;
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*(.init)
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*(.init)
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. = ALIGN(0x4);
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_initend = .;
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_initend = .;
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} AT> DRAM
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} AT> DRAM
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@ -88,6 +84,9 @@ SECTIONS
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stackend = .;
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stackend = .;
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} > DRAM
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} > DRAM
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/* physical address of the stack */
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stackend_phys = stackend - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR;
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/* treat .bss and .ncbss as a single section */
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/* treat .bss and .ncbss as a single section */
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.bss (NOLOAD) :
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.bss (NOLOAD) :
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{
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{
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@ -33,9 +33,9 @@
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ldr pc, =irq_handler
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ldr pc, =irq_handler
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ldr pc, =fiq_handler
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ldr pc, =fiq_handler
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/* When starting, we are running at 0x40000000 but the code
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/* When starting, we are running at 0x4xxxxxxx (uncached) but the code
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* assumes DRAM is somewhere else (for caching) so we first need to
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* assumes DRAM is somewhere else (cached) so we first need to
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* setup the MMU and then jump to the right location */
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* setup the MMU and then jump to the right location. */
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.text
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.text
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.global start
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.global start
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start:
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start:
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@ -49,9 +49,12 @@ start:
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bic r0, r1
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bic r0, r1
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mcr p15, 0, r0, c1, c0, 0
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mcr p15, 0, r0, c1, c0, 0
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/* To call the C code we need a stack, since the stack is in virtual memory
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* use the stack's physical address */
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ldr sp, =stackend_phys
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/* Enable MMU */
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/* Enable MMU */
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bl memory_init
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bl memory_init
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/* Jump to real location */
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/* Jump to real location */
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ldr pc, =remap
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ldr pc, =remap
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remap:
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remap:
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