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imx233/fuze+: fix ctr0 to use a fresh stack and update firmware linker script

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30523 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly 2011-09-13 23:38:45 +00:00
parent 3d46b080fd
commit ddb96f1b65
2 changed files with 18 additions and 16 deletions
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23
firmware/target/arm/imx233/app.lds
View file

@ -9,9 +9,6 @@ STARTUP(target/arm/imx233/crt0.o)
#define PLUGINSIZE PLUGIN_BUFFER_SIZE
#define CODECSIZE CODEC_SIZE
#define DRAMORIG DRAM_ORIG
#define IRAMORIG IRAM_ORIG
#define IRAMSIZE IRAM_SIZE
#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - FRAME_SIZE - TTB_SIZE)
@ -28,26 +25,24 @@ STARTUP(target/arm/imx233/crt0.o)
MEMORY
{
IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAMSIZE
DRAM : ORIGIN = CACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
UNCACHED_DRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
UDRAM : ORIGIN = UNCACHED_DRAM_ADDR, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE
}
SECTIONS
{
loadaddress = UNCACHED_DRAM_ADDR;
_loadaddress = UNCACHED_DRAM_ADDR;
.text :
{
*(.text*)
} > DRAM
.data :
{
*(.data*)
*(.rodata*)
_dataend = . ;
} > DRAM
.iram :
.itext :
{
_iramstart = .; // always 0
*(.vectors)
@ -59,7 +54,7 @@ SECTIONS
_iramend = .;
} > IRAM AT> DRAM
_iramcopy = LOADADDR(.iram);
_iramcopy = LOADADDR(.itext);
.ibss (NOLOAD) :
{
@ -75,6 +70,7 @@ SECTIONS
. = ALIGN(4);
_initstart = .;
*(.init)
. = ALIGN(0x4);
_initend = .;
} AT> DRAM
@ -88,6 +84,9 @@ SECTIONS
stackend = .;
} > DRAM
/* physical address of the stack */
stackend_phys = stackend - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR;
/* treat .bss and .ncbss as a single section */
.bss (NOLOAD) :
{

11
firmware/target/arm/imx233/crt0.S
View file

@ -33,9 +33,9 @@
ldr pc, =irq_handler
ldr pc, =fiq_handler
/* When starting, we are running at 0x40000000 but the code
* assumes DRAM is somewhere else (for caching) so we first need to
* setup the MMU and then jump to the right location */
/* When starting, we are running at 0x4xxxxxxx (uncached) but the code
* assumes DRAM is somewhere else (cached) so we first need to
* setup the MMU and then jump to the right location. */
.text
.global start
start:
@ -49,9 +49,12 @@ start:
bic r0, r1
mcr p15, 0, r0, c1, c0, 0
/* To call the C code we need a stack, since the stack is in virtual memory
* use the stack's physical address */
ldr sp, =stackend_phys
/* Enable MMU */
bl memory_init
/* Jump to real location */
ldr pc, =remap
remap: