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Add support for S5L8720 in various places

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Due to its similarity with S5L8702, clickwheel support and sleep can be used as-is on S5L8720. DRAM and IRAM are also configured.

Change-Id: I52f8a3417e6a25c7360b1cae2fb5eed621e2e0db
This commit is contained in:
Vencislav Atanasov 2024-11-22 00:01:48 +02:00 • committed by Solomon Peachy
parent 6691214e51
commit d7b57e33d9
5 changed files with 20 additions and 13 deletions
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9
apps/plugins/plugin.lds
View file

@ -76,7 +76,7 @@ OUTPUT_FORMAT(elf32-littlemips)
#else #else
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE) #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
#endif #endif
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
#define ASM #define ASM
#include "cpu.h" #include "cpu.h"
#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE) #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
@ -173,6 +173,13 @@ OUTPUT_FORMAT(elf32-littlemips)
#define IRAMORIG (0x00000000 + (48*1024)) #define IRAMORIG (0x00000000 + (48*1024))
#define IRAMSIZE (80*1024) #define IRAMSIZE (80*1024)
#elif CONFIG_CPU==S5L8720
/* S5L8720 have 192KB of IRAM */
/* TODO: check if IRAM1 is also slow as in S5L8702 above */
#define DRAMORIG 0x08000000
#define IRAMORIG (0x00000000 + (56*1024))
#define IRAMSIZE (136*1024)
#elif CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B #elif CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
#undef STUBOFFSET #undef STUBOFFSET
#ifdef DEBUG #ifdef DEBUG

2
bootloader/SOURCES
View file

@ -4,7 +4,7 @@ snprintf.c
#if defined(IPOD_NANO2G) #if defined(IPOD_NANO2G)
ipodnano2g.c ipodnano2g.c
#elif defined(IPOD_6G) #elif defined(IPOD_6G) || defined(IPOD_NANO3G) || defined(IPOD_NANO4G)
ipod-s5l87xx.c ipod-s5l87xx.c
#elif defined(IPOD_ARCH) #elif defined(IPOD_ARCH)
ipod.c ipod.c

2
firmware/export/cpu.h
View file

@ -56,7 +56,7 @@
#if CONFIG_CPU == S5L8700 || CONFIG_CPU == S5L8701 #if CONFIG_CPU == S5L8700 || CONFIG_CPU == S5L8701
#include "s5l8700.h" #include "s5l8700.h"
#endif #endif
#if CONFIG_CPU == S5L8702 #if CONFIG_CPU == S5L8702 || CONFIG_CPU == S5L8720
#include "s5l8702.h" #include "s5l8702.h"
#endif #endif
#if CONFIG_CPU == JZ4732 #if CONFIG_CPU == JZ4732

18
firmware/target/arm/ipod/button-clickwheel.c
View file

@ -42,7 +42,7 @@
#ifdef IPOD_NANO2G #ifdef IPOD_NANO2G
#include "pmu-target.h" #include "pmu-target.h"
#endif #endif
#ifdef IPOD_6G #if defined(IPOD_6G) || defined(IPOD_NANO3G) || defined(IPOD_NANO4G)
#include "pmu-target.h" #include "pmu-target.h"
#include "clocking-s5l8702.h" #include "clocking-s5l8702.h"
#endif #endif
@ -53,7 +53,7 @@
#ifdef CPU_PP #ifdef CPU_PP
#define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x7000c140)) #define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x7000c140))
#elif CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
#define CLICKWHEEL_DATA WHEELRX #define CLICKWHEEL_DATA WHEELRX
#else #else
#error CPU architecture not supported! #error CPU architecture not supported!
@ -87,7 +87,7 @@ static int int_btn = BUTTON_NONE;
static bool send_events = true; static bool send_events = true;
#endif #endif
#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 #if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
static struct semaphore button_init_wakeup; static struct semaphore button_init_wakeup;
#endif #endif
@ -267,7 +267,7 @@ static inline int ipod_4g_button_read(void)
outl(inl(0x7000c104) | 0x04000000, 0x7000c104); outl(inl(0x7000c104) | 0x04000000, 0x7000c104);
outl(inl(0x7000c100) | 0x60000000, 0x7000c100); outl(inl(0x7000c100) | 0x60000000, 0x7000c100);
} }
#if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 #if CONFIG_CPU==S5L8701 || CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
else if ((status & 0x8000FFFF) == 0x8000023A) else if ((status & 0x8000FFFF) == 0x8000023A)
{ {
if (status & 0x00010000) if (status & 0x00010000)
@ -379,7 +379,7 @@ static void s5l_clickwheel_init(void)
WHEELTX = 0x8000023A; WHEELTX = 0x8000023A;
WHEEL04 |= 1; WHEEL04 |= 1;
PDAT10 &= ~2; PDAT10 &= ~2;
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
clockgate_enable(CLOCKGATE_CWHEEL, true); clockgate_enable(CLOCKGATE_CWHEEL, true);
PCONE = (PCONE & ~0x00ffff00) | 0x00222200; PCONE = (PCONE & ~0x00ffff00) | 0x00222200;
WHEEL00 = 0; /* stop s5l8702 controller */ WHEEL00 = 0; /* stop s5l8702 controller */
@ -410,7 +410,7 @@ bool button_hold(void)
PCON15 = PCON15 & ~0xffff0000; PCON15 = PCON15 & ~0xffff0000;
else PCON15 = (PCON15 & ~0xffff0000) | 0x22220000; else PCON15 = (PCON15 & ~0xffff0000) | 0x22220000;
return value; return value;
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
return pmu_holdswitch_locked(); return pmu_holdswitch_locked();
#endif #endif
} }
@ -419,7 +419,7 @@ bool headphones_inserted(void)
{ {
#if CONFIG_CPU==S5L8701 #if CONFIG_CPU==S5L8701
return ((PDAT14 & (1 << 5)) != 0); return ((PDAT14 & (1 << 5)) != 0);
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
return ((PDATA & (1 << 6)) != 0); return ((PDATA & (1 << 6)) != 0);
#endif #endif
} }
@ -453,7 +453,7 @@ int button_read_device(void)
WHEEL00 = 0; WHEEL00 = 0;
WHEEL10 = 0; WHEEL10 = 0;
PWRCONEXT |= 1; PWRCONEXT |= 1;
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
WHEEL00 = 0; WHEEL00 = 0;
PCONE = (PCONE & ~0x00ffff00) | 0x000e0e00; PCONE = (PCONE & ~0x00ffff00) | 0x000e0e00;
clockgate_enable(CLOCKGATE_CWHEEL, false); clockgate_enable(CLOCKGATE_CWHEEL, false);
@ -468,7 +468,7 @@ int button_read_device(void)
#elif CONFIG_CPU==S5L8701 #elif CONFIG_CPU==S5L8701
/*pmu_ldo_power_on(1);*/ /* enable clickwheel power supply */ /*pmu_ldo_power_on(1);*/ /* enable clickwheel power supply */
s5l_clickwheel_init(); s5l_clickwheel_init();
#elif CONFIG_CPU==S5L8702 #elif CONFIG_CPU==S5L8702 || CONFIG_CPU==S5L8720
s5l_clickwheel_init(); s5l_clickwheel_init();
#endif #endif
} }

2
firmware/target/arm/system-arm.h
View file

@ -385,7 +385,7 @@ static inline uint32_t swaw32_hw(uint32_t value)
#if defined(CPU_TCC780X) /* Single core only for now */ \ #if defined(CPU_TCC780X) /* Single core only for now */ \
|| CONFIG_CPU == IMX31L || CONFIG_CPU == DM320 || CONFIG_CPU == AS3525 \ || CONFIG_CPU == IMX31L || CONFIG_CPU == DM320 || CONFIG_CPU == AS3525 \
|| CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2 \ || CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2 \
|| CONFIG_CPU == S5L8702 || CONFIG_CPU == S5L8702 || CONFIG_CPU == S5L8720
/* Use the generic ARMv4/v5/v6 wait for IRQ */ /* Use the generic ARMv4/v5/v6 wait for IRQ */
static inline void core_sleep(void) static inline void core_sleep(void)
{ {