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Add PLL2 definitions for the S5L8701, plus some config file tweaks for the Nano2G

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22715 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman 2009-09-17 07:36:09 +00:00
parent 8dae933293
commit d67c4d2f6b
3 changed files with 9 additions and 14 deletions
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20
firmware/export/config-ipodnano2g.h
View file

@ -9,11 +9,11 @@
#define MODEL_NAME "Apple iPod Nano 2g" #define MODEL_NAME "Apple iPod Nano 2g"
/* define this if you have recording possibility */ /* define this if you have recording possibility */
//#define HAVE_RECORDING #define HAVE_RECORDING
/* Define bitmask of input sources - recordable bitmask can be defined /* Define bitmask of input sources - recordable bitmask can be defined
explicitly if different */ explicitly if different */
#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_FMRADIO) #define INPUT_SRC_CAPS (SRC_CAP_LINEIN)
/* define the bitmask of hardware sample rates */ /* define the bitmask of hardware sample rates */
#define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11) #define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11)
@ -86,7 +86,7 @@
#define CONFIG_LCD LCD_NANO2G #define CONFIG_LCD LCD_NANO2G
/* Define the type of audio codec */ /* Define the type of audio codec */
#define HAVE_UDA1380 #define HAVE_WM8975
/* Define this for LCD backlight available */ /* Define this for LCD backlight available */
#define HAVE_BACKLIGHT #define HAVE_BACKLIGHT
@ -101,14 +101,6 @@
/* The number of bytes reserved for loadable plugins */ /* The number of bytes reserved for loadable plugins */
#define PLUGIN_BUFFER_SIZE 0x80000 #define PLUGIN_BUFFER_SIZE 0x80000
/* FM Tuner */
#define CONFIG_TUNER TEA5760
#define CONFIG_TUNER_XTAL 32768
//#define HAVE_TLV320
/* TLV320 has no tone controls, so we use the software ones */
#define HAVE_SW_TONE_CONTROLS
#define BATTERY_CAPACITY_DEFAULT 700 /* default battery capacity */ #define BATTERY_CAPACITY_DEFAULT 700 /* default battery capacity */
#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */ #define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */
@ -124,10 +116,10 @@
/* Define this if your LCD can set contrast */ /* Define this if your LCD can set contrast */
//#define HAVE_LCD_CONTRAST //#define HAVE_LCD_CONTRAST
/* Define this if you have a Motorola SCF5250 */ /* The exact type of CPU */
#define CONFIG_CPU S5L8701 #define CONFIG_CPU S5L8701
/* Define this if you want to use coldfire's i2c interface */ /* I2C interface */
#define CONFIG_I2C I2C_S5L8700 #define CONFIG_I2C I2C_S5L8700
/* define this if the hardware can be powered off while charging */ /* define this if the hardware can be powered off while charging */
@ -137,7 +129,7 @@
#define FLASH_SIZE 0x400000 #define FLASH_SIZE 0x400000
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 11289600 #define CPU_FREQ 200000000
/* Define this if you have ATA power-off control */ /* Define this if you have ATA power-off control */
//#define HAVE_ATA_POWER_OFF //#define HAVE_ATA_POWER_OFF

1
firmware/export/config.h
View file

@ -197,6 +197,7 @@
#define LCD_LYRE_PROTO1 33 /* as used by the Lyre */ #define LCD_LYRE_PROTO1 33 /* as used by the Lyre */
#define LCD_YH925 34 /* as used by Samsung YH-925 (similar to the H10 20GB) */ #define LCD_YH925 34 /* as used by Samsung YH-925 (similar to the H10 20GB) */
#define LCD_VIEW 35 /* as used by the Sansa View */ #define LCD_VIEW 35 /* as used by the Sansa View */
#define LCD_NANO2G 36 /* as used by the iPod Nano 2nd Generation */
/* LCD_PIXELFORMAT */ /* LCD_PIXELFORMAT */
#define HORIZONTAL_PACKING 1 #define HORIZONTAL_PACKING 1

2
firmware/export/s5l8700.h
View file

@ -108,8 +108,10 @@
#define CLKCON (*(REG32_PTR_T)(0x3C500000)) /* Clock control Register */ #define CLKCON (*(REG32_PTR_T)(0x3C500000)) /* Clock control Register */
#define PLL0PMS (*(REG32_PTR_T)(0x3C500004)) /* PLL PMS value Register */ #define PLL0PMS (*(REG32_PTR_T)(0x3C500004)) /* PLL PMS value Register */
#define PLL1PMS (*(REG32_PTR_T)(0x3C500008)) /* PLL PMS value Register */ #define PLL1PMS (*(REG32_PTR_T)(0x3C500008)) /* PLL PMS value Register */
#define PLL2PMS (*(REG32_PTR_T)(0x3C50000C)) /* PLL PMS value Register - S5L8701 only? */
#define PLL0LCNT (*(REG32_PTR_T)(0x3C500014)) /* PLL0 lock count register */ #define PLL0LCNT (*(REG32_PTR_T)(0x3C500014)) /* PLL0 lock count register */
#define PLL1LCNT (*(REG32_PTR_T)(0x3C500018)) /* PLL1 lock count register */ #define PLL1LCNT (*(REG32_PTR_T)(0x3C500018)) /* PLL1 lock count register */
#define PLL2LCNT (*(REG32_PTR_T)(0x3C50001C)) /* PLL2 lock count register - S5L8701 only? */
#define PLLLOCK (*(REG32_PTR_T)(0x3C500020)) /* PLL lock status register */ #define PLLLOCK (*(REG32_PTR_T)(0x3C500020)) /* PLL lock status register */
#define PLLCON (*(REG32_PTR_T)(0x3C500024)) /* PLL control register */ #define PLLCON (*(REG32_PTR_T)(0x3C500024)) /* PLL control register */
#define PWRCON (*(REG32_PTR_T)(0x3C500028)) /* Clock power control register */ #define PWRCON (*(REG32_PTR_T)(0x3C500028)) /* Clock power control register */