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FS#10317 - Sansa AMS 32-bit timers. Configure the timers for 32-bit mode instead of the default 16-bit mode.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21266 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Bertrik Sikken 2009-06-12 21:11:45 +00:00
parent 9d2208e806
commit d1faf8b39c
2 changed files with 16 additions and 30 deletions
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20
firmware/target/arm/as3525/kernel-as3525.c
View file

@ -61,26 +61,18 @@ void INT_TIMER2(void)
void tick_start(unsigned int interval_in_ms) void tick_start(unsigned int interval_in_ms)
{ {
int phi = 0; /* prescaler bits */
int prescale = 1;
int cycles = KERNEL_TIMER_FREQ / 1000 * interval_in_ms; int cycles = KERNEL_TIMER_FREQ / 1000 * interval_in_ms;
while(cycles > 0x10000)
{
phi++;
prescale <<= 4;
cycles >>= 4;
}
if(prescale > 256)
panicf("%s : interval too big", __func__);
CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */ CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */
VIC_INT_ENABLE |= INTERRUPT_TIMER2; /* enable interrupt */ VIC_INT_ENABLE |= INTERRUPT_TIMER2; /* enable interrupt */
TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */ TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */
/* /!\ bit 4 (reserved) must not be modified /* /!\ bit 4 (reserved) must not be modified
* periodic mode, interrupt enabled, 16 bits counter */ * periodic mode, interrupt enabled, no prescale, 32 bits counter */
TIMER2_CONTROL = (TIMER2_CONTROL & (1<<4)) | 0xe0 | (phi<<2); TIMER2_CONTROL = (TIMER2_CONTROL & (1<<4)) |
TIMER_ENABLE |
TIMER_PERIODIC |
TIMER_INT_ENABLE |
TIMER_32_BIT;
} }

26
firmware/timer.c
View file

@ -109,23 +109,17 @@ void TIMER1_ISR(void)
static bool timer_set(long cycles, bool start) static bool timer_set(long cycles, bool start)
{ {
#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE) || CONFIG_CPU == AS3525 #if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
int phi = 0; /* bits for the prescaler */ int phi = 0; /* bits for the prescaler */
int prescale = 1; int prescale = 1;
#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
#define PRESCALE_STEP 1
#else /* CONFIG_CPU == AS3525 */
#define PRESCALE_STEP 4
#endif
while (cycles > 0x10000) while (cycles > 0x10000)
{ /* work out the smallest prescaler that makes it fit */ { /* work out the smallest prescaler that makes it fit */
#if CONFIG_CPU == SH7034 || CONFIG_CPU == AS3525 #if CONFIG_CPU == SH7034
phi++; phi++;
#endif #endif
prescale <<= PRESCALE_STEP; prescale <<= 1;
cycles >>= PRESCALE_STEP; cycles >>= 1;
} }
#endif #endif
@ -178,10 +172,6 @@ static bool timer_set(long cycles, bool start)
return true; return true;
#elif CONFIG_CPU == AS3525 #elif CONFIG_CPU == AS3525
/* XXX: 32 bits cycles could be used */
if (prescale > 256 || cycles > 0x10000)
return false;
if (start) if (start)
{ {
if (pfn_unregister != NULL) if (pfn_unregister != NULL)
@ -193,8 +183,12 @@ static bool timer_set(long cycles, bool start)
TIMER1_LOAD = TIMER1_BGLOAD = cycles; TIMER1_LOAD = TIMER1_BGLOAD = cycles;
/* /!\ bit 4 (reserved) must not be modified /* /!\ bit 4 (reserved) must not be modified
* periodic mode, interrupt enabled, 16 bits counter */ * periodic mode, interrupt enabled, no prescale, 32 bits counter */
TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) | 0xe0 | (phi<<2); TIMER1_CONTROL = (TIMER2_CONTROL & (1<<4)) |
TIMER_ENABLE |
TIMER_PERIODIC |
TIMER_INT_ENABLE |
TIMER_32_BIT;
return true; return true;
#elif defined CPU_COLDFIRE #elif defined CPU_COLDFIRE
if (prescale > 4096/CPUFREQ_MAX_MULT) if (prescale > 4096/CPUFREQ_MAX_MULT)