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imx233: enable PLL on startup

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Implement PLL enabling/disable and unconditionally power the PLL
on startup. This is needed at least on the Zen X-Fi2.

Change-Id: Ib9ddfdeaf973cedded4b3586dd16aa95a61e78ba
This commit is contained in:
Amaury Pouly 2012-05-21 16:28:12 +02:00
parent 0ebfb937aa
commit cd7a478ec1
3 changed files with 14 additions and 1 deletions
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11
firmware/target/arm/imx233/clkctrl-imx233.c
View file

@ -43,6 +43,17 @@ void imx233_clkctrl_enable_clock(enum imx233_clock_t clk, bool enable)
{
case CLK_PIX: REG = &HW_CLKCTRL_PIX; break;
case CLK_SSP: REG = &HW_CLKCTRL_SSP; break;
case CLK_PLL:
{
if(enable)
{
__REG_SET(HW_CLKCTRL_PLLCTRL0) = HW_CLKCTRL_PLLCTRL0__POWER;
while(!(HW_CLKCTRL_PLLCTRL1 & HW_CLKCTRL_PLLCTRL1__LOCK));
}
else
__REG_CLR(HW_CLKCTRL_PLLCTRL0) = HW_CLKCTRL_PLLCTRL0__POWER;
return;
}
default: return;
}

3
firmware/target/arm/imx233/clkctrl-imx233.h
View file

@ -34,6 +34,7 @@
#define HW_CLKCTRL_PLLCTRL0__DIV_SEL_BM (3 << 20)
#define HW_CLKCTRL_PLLCTRL1 (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x10))
#define HW_CLKCTRL_PLLCTRL1__LOCK (1 << 31)
#define HW_CLKCTRL_CPU (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x20))
#define HW_CLKCTRL_CPU__DIV_CPU_BP 0
@ -121,7 +122,7 @@ enum imx233_clock_t
CLK_IO, /* freq, frac */
CLK_CPU, /* freq, div, frac, bypass */
CLK_HBUS, /* freq, div, frac */
CLK_PLL, /* freq */
CLK_PLL, /* freq, enable */
CLK_XTAL, /* freq */
CLK_EMI, /* freq */
CLK_XBUS, /* freq, div */

1
firmware/target/arm/imx233/system-imx233.c
View file

@ -100,6 +100,7 @@ void memory_init(void)
void system_init(void)
{
imx233_clkctrl_enable_clock(CLK_PLL, true);
imx233_rtc_init();
imx233_icoll_init();
imx233_pinctrl_init();