len0rd/rockbox
1
0
Fork 1
mirror of https://github.com/Rockbox/rockbox.git synced 2025-12-09 05:05:20 -05:00
Code Issues Projects Releases Packages Wiki Activity Actions

Meg-FX: Enable a real tick in the bootloader. Do cleanups before switching to firmware and cache handling. Put proper main return address in lr.

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19368 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-12-08 23:31:05 +00:00
parent ea929a3e45
commit cb06108024
7 changed files with 45 additions and 28 deletions
Download patch file Download diff file Expand all files Collapse all files

4
firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
View file

@ -21,6 +21,10 @@
#ifndef ATA_TARGET_H
#define ATA_TARGET_H
#ifdef BOOTLOADER
#define ATA_DRIVER_CLOSE
#endif
/* Plain C read & write loops */
#define PREFER_C_READING
#define PREFER_C_WRITING

29
firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c
View file

@ -24,7 +24,7 @@
#include "timer.h"
#include "thread.h"
static inline void tick_set(unsigned int interval_in_ms)
void tick_start(unsigned int interval_in_ms)
{
/*
* Based on default PCLK of 49.1568MHz - scaling chosen to give
@ -49,11 +49,6 @@ static inline void tick_set(unsigned int interval_in_ms)
TCON |= 1 << 21;
/* reset manual bit */
TCON &= ~(1 << 21);
}
void tick_start(unsigned int interval_in_ms)
{
tick_set(interval_in_ms);
/* interval mode */
TCON |= 1 << 22;
@ -65,24 +60,14 @@ void tick_start(unsigned int interval_in_ms)
}
#ifdef BOOTLOADER
void delay(int ticks)
void tick_stop(void)
{
volatile unsigned long counter;
INTMSK |= TIMER4_MASK;
tick_set(1000 * ticks / HZ);
/* autoreload Off */
TCON &= ~(1 << 22);
/* start timer 4 */
TCON |= (1 << 20);
do {
counter = TCNTO4;
} while(counter > 0);
s3c_regset32(&INTMSK, TIMER4_MASK);
TCON &= ~(1 << 20);
SRCPND = TIMER4_MASK;
INTPND = TIMER4_MASK;
}
#endif /* BOOTLOADER */
#endif
void TIMER4(void)
{

9
firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
View file

@ -143,6 +143,15 @@ void s3c_regclr32(volatile unsigned long *reg, unsigned long bits)
s3c_regmod32(reg, 0, bits);
}
#ifdef BOOTLOADER
void system_prepare_fw_start(void)
{
tick_stop();
disable_interrupt(IRQ_FIQ_STATUS);
INTMSK = 0xFFFFFFFF;
}
#endif
void system_init(void)
{
INTMSK = 0xFFFFFFFF;

3
firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
View file

@ -28,6 +28,9 @@
#define CPUFREQ_NORMAL 98784000
#define CPUFREQ_MAX 296352000
void system_prepare_fw_start(void);
void tick_stop(void);
/* Functions to set and clear regiser bits atomically */
/* Set and clear register bits */