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imx233: fix potential hbus dividor settings + doc

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HBUS uses the same field for integer and fractional dividers, the
choice is made by a bit. Make sure both are changed together,
otherwise this could result in the wrong divider to be used and in
HBUS freq to be too low or too high (very bad).

Change-Id: I253d8eeee26c5038868b729c4f791511295a39f0
This commit is contained in:
Amaury Pouly 2012-12-26 01:06:04 +01:00
parent 423755d1bd
commit ca83b558df
2 changed files with 10 additions and 4 deletions
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9
firmware/target/arm/imx233/clkctrl-imx233.c
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@ -103,7 +103,9 @@ void imx233_clkctrl_set_clock_divisor(enum imx233_clock_t clk, int div)
__FIELD_SET(HW_CLKCTRL_EMI, DIV_EMI, div);
break;
case CLK_HBUS:
__FIELD_SET(HW_CLKCTRL_HBUS, DIV, div);
/* disable frac enable at the same time */
HW_CLKCTRL_HBUS = div << HW_CLKCTRL_HBUS__DIV_BP |
(HW_CLKCTRL_HBUS & ~(HW_CLKCTRL_HBUS__DIV_FRAC_EN | HW_CLKCTRL_HBUS__DIV_BM));
break;
case CLK_XBUS:
__FIELD_SET(HW_CLKCTRL_XBUS, DIV, div);
@ -137,8 +139,9 @@ void imx233_clkctrl_set_fractional_divisor(enum imx233_clock_t clk, int fracdiv)
switch(clk)
{
case CLK_HBUS:
__FIELD_SET(HW_CLKCTRL_HBUS, DIV, fracdiv);
__REG_SET(HW_CLKCTRL_HBUS) = HW_CLKCTRL_HBUS__DIV_FRAC_EN;
/* set frac enable at the same time */
HW_CLKCTRL_HBUS = fracdiv << HW_CLKCTRL_HBUS__DIV_BP | HW_CLKCTRL_HBUS__DIV_FRAC_EN |
(HW_CLKCTRL_HBUS & ~HW_CLKCTRL_HBUS__DIV_BM);
return;
case CLK_PIX: REG = &HW_CLKCTRL_FRAC_PIX; break;
case CLK_IO: REG = &HW_CLKCTRL_FRAC_IO; break;