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atj213x: e100/150 lcd test binary

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Change-Id: I3f9fa21dcb33d1cd3081d0c995adfb44e085dd7a
This commit is contained in:
Marcin Bukat 2014-10-18 20:16:10 +02:00
parent fe519c7e4d
commit c626fe7004
10 changed files with 6075 additions and 0 deletions
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63
utils/atj2137/adfuload/test_binary/lcm/system-atj213x.c Normal file
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#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
default_interrupt(INT_MCA);
default_interrupt(INT_SD);
default_interrupt(INT_MHA);
/* default_interrupt(INT_USB); seems wrong */
default_interrupt(INT_DSP);
default_interrupt(INT_PCNT);
default_interrupt(INT_WD);
default_interrupt(INT_T1);
default_interrupt(INT_T0);
default_interrupt(INT_RTC);
default_interrupt(INT_DMA);
default_interrupt(INT_KEY);
default_interrupt(INT_EXT);
default_interrupt(INT_IIC2);
default_interrupt(INT_IIC1);
default_interrupt(INT_ADC);
default_interrupt(INT_DAC);
default_interrupt(INT_NAND);
default_interrupt(INT_YUV);
/* this will be panicf() on regular rockbox fw */
static void UIRQ(void)
{
while(1);
}
/* TRICK ALERT !!!!
* The table is organized in reversed order so
* clz on INTC_PD returns the index in this table
*/
void (* const irqvector[])(void) __attribute__((used)) =
{
UIRQ, UIRQ, UIRQ, UIRQ, UIRQ, INT_YUV, UIRQ, INT_NAND,
UIRQ, INT_DAC, INT_ADC, UIRQ, UIRQ, INT_IIC1, INT_IIC2, UIRQ,
UIRQ, INT_EXT, INT_KEY, INT_DMA, INT_RTC, INT_T0, INT_T1, INT_WD,
INT_PCNT, UIRQ, INT_DSP, UIRQ, INT_MHA, INT_SD, UIRQ, INT_MCA
};
#define CPU_FREQ 60000000UL //???
void udelay(unsigned int usec)
{
unsigned int i = ((usec * CPU_FREQ) / 2000000);
asm volatile (
".set noreorder \n"
"1: \n"
"bne %0, $0, 1b \n"
"addiu %0, %0, -1 \n"
".set reorder \n"
: "=r" (i)
: "0" (i)
);
}
void mdelay(unsigned int msec)
{
unsigned int i;
for(i=0; i<msec; i++)
udelay(1000);
}