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arm: add ARMv7-M version of ARMv6 mixer code
GCC cannot compile the existing assembly here on ARMv7-M, claiming impossible constraints. It is actually possible to compile if the input arguments (addresses and sizes) are first moved to a high register so as not to conflict with the use of r0-r7 in ldm/stm -- this is exactly what GCC does for ARMv6, but it won't do it on ARMv7-M for some reason. We can get a result similar to the ARMv6 code by manually moving the inputs into temporaries, but the generated code is a actually a bit smaller on ARMv7-M if the r0-r7 block is shifted up to r3-r10. This only works since ARMv7-M supports the 32-bit Thumb encoding -- 16-bit Thumb can't represent an ldm/stm instruction of this type. It's worth #ifdef'ing the code because although the ARMv7-M version works on ARMv6 too, it spills a lot of registers on the stack even though register use is mostly similar. Change-Id: I9bc8b5c76e198aecfd0a0e7a2158b1c00f82c4df
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@ -78,6 +78,27 @@ static FORCE_INLINE void write_samples(void *out,
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if (LIKELY(amp == MIX_AMP_UNITY))
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{
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/* Channel is unity amplitude */
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#if defined(CPU_ARM_MICRO) && ARCH_VERSION >= 7
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asm volatile (
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"ands r4, %2, #0x1f \n"
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"beq 2f \n"
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"1: \n"
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"ldr r3, [%1], #4 \n"
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"subs r4, r4, #4 \n"
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"str r3, [%0], #4 \n"
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"bne 1b \n"
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"bics %2, %2, #0x1f \n"
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"beq 3f \n"
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"2: \n"
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"ldmia %1!, { r3-r10 } \n"
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"subs %2, %2, #32 \n"
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"stmia %0!, { r3-r10 } \n"
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"bhi 2b \n"
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"3: \n"
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: "+lr"(out), "+lr"(src), "+r"(size)
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:
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: "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10");
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#else
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asm volatile (
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"ands r1, %2, #0x1f \n"
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"beq 2f \n"
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@ -97,6 +118,7 @@ static FORCE_INLINE void write_samples(void *out,
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: "+r"(out), "+r"(src), "+r"(size)
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:
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: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7");
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#endif
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}
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else
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{
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