mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-12-08 20:55:17 -05:00
AMS v1/v2: Fix I2C2_CSPR debug menu entry
I2c controller needs to be enabled in order to read CSPR0, CSPR1 registers function sets CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE and only clears if it wasn't previously enabled Use divider set in register to calculate frequency rather than hard coded divider Change-Id: I54ecc0c1859e906c00f4c2ae8ae2424a4619df98
This commit is contained in:
parent
6a568761c8
commit
c15af64452
3 changed files with 32 additions and 20 deletions
|
|
@ -675,3 +675,18 @@ void ascodec_init(void)
|
|||
IFRTC_IRQ_RTC | IRQ_ADC);
|
||||
#endif
|
||||
}
|
||||
|
||||
void ams_i2c_get_debug_cpsr(unsigned int *i2c_cpsr)
|
||||
{
|
||||
int oldlevel = disable_interrupt_save(IRQ_FIQ_STATUS);
|
||||
/* must be on to read regs */
|
||||
bool i2c_enabled = bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE) &
|
||||
CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE;
|
||||
|
||||
*i2c_cpsr = (I2C2_CPSR1<<8 | I2C2_CPSR0);
|
||||
|
||||
if (!i2c_enabled) /* put it back how we found it */
|
||||
bitclr32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
|
||||
|
||||
restore_irq(oldlevel);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue