as3525*: use atomic bit manipulation for CCU_IO

fuzev2 button_read_device() runs in interrupt context so writes are atomic

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27494 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2010-07-19 15:56:15 +00:00
parent 25491980d6
commit b221d6d4d4
5 changed files with 11 additions and 11 deletions

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@ -158,11 +158,11 @@ void fmradio_i2c_init(void)
int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count) int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count)
{ {
#ifdef SANSA_FUZEV2 #ifdef SANSA_FUZEV2
CCU_IO &= ~(1<<12); bitclr32(&CCU_IO, 1<<12);
#endif #endif
int ret = i2c_write_data(fm_i2c_bus, address, -1, buf, count); int ret = i2c_write_data(fm_i2c_bus, address, -1, buf, count);
#ifdef SANSA_FUZEV2 #ifdef SANSA_FUZEV2
CCU_IO |= 1<<12; bitset32(&CCU_IO, 1<<12);
#endif #endif
return ret; return ret;
} }
@ -170,11 +170,11 @@ int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count
int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count) int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count)
{ {
#ifdef SANSA_FUZEV2 #ifdef SANSA_FUZEV2
CCU_IO &= ~(1<<12); bitclr32(&CCU_IO, 1<<12);
#endif #endif
int ret = i2c_read_data(fm_i2c_bus, address, -1, buf, count); int ret = i2c_read_data(fm_i2c_bus, address, -1, buf, count);
#ifdef SANSA_FUZEV2 #ifdef SANSA_FUZEV2
CCU_IO |= 1<<12; bitset32(&CCU_IO, 1<<12);
#endif #endif
return ret; return ret;
} }

View file

@ -29,7 +29,7 @@
void lcd_hw_init(int *offset) void lcd_hw_init(int *offset)
{ {
/* DBOP initialisation, do what OF does */ /* DBOP initialisation, do what OF does */
CCU_IO |= (1<<12); /* ?? */ bitset32(&CCU_IO, 1<<12); /* ?? */
CGU_DBOP |= /*(1<<3)*/ 0x18 | AS3525_DBOP_DIV; CGU_DBOP |= /*(1<<3)*/ 0x18 | AS3525_DBOP_DIV;
DBOP_CTRL = 0x51004; DBOP_CTRL = 0x51004;

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@ -54,7 +54,7 @@ void lcd_write_reg(int reg, int value)
static void as3525_dbop_init(void) static void as3525_dbop_init(void)
{ {
CCU_IO |= 1<<12; bitset32(&CCU_IO, 1<<12);
CGU_DBOP |= (1<<4) | (1<<3) | AS3525_DBOP_DIV; CGU_DBOP |= (1<<4) | (1<<3) | AS3525_DBOP_DIV;
DBOP_TIMPOL_01 = 0xE12FE12F; DBOP_TIMPOL_01 = 0xE12FE12F;
DBOP_TIMPOL_23 = 0xE12F0036; DBOP_TIMPOL_23 = 0xE12F0036;

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@ -564,8 +564,8 @@ int sd_init(void)
bitset32(&CGU_PERI, CGU_NAF_CLOCK_ENABLE); bitset32(&CGU_PERI, CGU_NAF_CLOCK_ENABLE);
#ifdef HAVE_MULTIDRIVE #ifdef HAVE_MULTIDRIVE
bitset32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE); bitset32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE);
CCU_IO &= ~(1<<3); /* bits 3:2 = 01, xpd is SD interface */ bitclr32(&CCU_IO, 1<<3); /* bits 3:2 = 01, xpd is SD interface */
CCU_IO |= (1<<2); bitset32(&CCU_IO, 1<<2);
#endif #endif
wakeup_init(&transfer_completion_signal); wakeup_init(&transfer_completion_signal);
@ -968,7 +968,7 @@ void sd_enable(bool on)
#if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE) #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
/* buttonlight AMSes need a bit of special handling for the buttonlight /* buttonlight AMSes need a bit of special handling for the buttonlight
* here due to the dual mapping of GPIOD and XPD */ * here due to the dual mapping of GPIOD and XPD */
CCU_IO |= (1<<2); /* XPD is SD-MCI interface (b3:2 = 01) */ bitset32(&CCU_IO, 1<<2); /* XPD is SD-MCI interface (b3:2 = 01) */
if (buttonlight_is_on) if (buttonlight_is_on)
GPIOD_DIR &= ~(1<<7); GPIOD_DIR &= ~(1<<7);
else else
@ -994,7 +994,7 @@ void sd_enable(bool on)
#endif /* defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE) */ #endif /* defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE) */
#if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE) #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
CCU_IO &= ~(1<<2); /* XPD is general purpose IO (b3:2 = 00) */ bitclr32(&CCU_IO, 1<<2); /* XPD is general purpose IO (b3:2 = 00) */
if (buttonlight_is_on) if (buttonlight_is_on)
_buttonlight_on(); _buttonlight_on();
#endif #endif

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@ -784,7 +784,7 @@ int sd_init(void)
#ifndef SANSA_CLIPV2 #ifndef SANSA_CLIPV2
/* Configure XPD for SD-MCI interface */ /* Configure XPD for SD-MCI interface */
CCU_IO |= (1<<2); bitset32(&CCU_IO, 1<<2);
#endif #endif
VIC_INT_ENABLE = INTERRUPT_NAND; VIC_INT_ENABLE = INTERRUPT_NAND;