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PP502x: Improve accuracy of header file. It looks as though DMA channels share the same interrupt enable (tested that 0 and 2 do at least).

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20089 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2009-02-23 04:33:33 +00:00
parent 93f4bd351b
commit b1dccc47fd
2 changed files with 6 additions and 12 deletions
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8
firmware/target/arm/pcm-pp.c
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@ -328,7 +328,7 @@ void pcm_play_lock(void)
if (++dma_play_data.locked == 1) {
#ifdef CPU_PP502x
CPU_INT_DIS = DMA0_MASK;
CPU_INT_DIS = DMA_MASK;
#else
IIS_IRQTX_REG &= ~IIS_IRQTX;
#endif
@ -343,7 +343,7 @@ void pcm_play_unlock(void)
if (--dma_play_data.locked == 0 && dma_play_data.state != 0) {
#ifdef CPU_PP502x
CPU_INT_EN = DMA0_MASK;
CPU_INT_EN = DMA_MASK;
#else
IIS_IRQTX_REG |= IIS_IRQTX;
#endif
@ -493,8 +493,8 @@ void pcm_play_dma_init(void)
#ifdef CPU_PP502x
/* Enable DMA controller */
DMA_MASTER_CONTROL |= DMA_MASTER_CONTROL_EN;
/* FIQ priority for DMA0 */
CPU_INT_PRIORITY |= DMA0_MASK;
/* FIQ priority for DMA */
CPU_INT_PRIORITY |= DMA_MASK;
/* Enable request?? Not setting or clearing everything doesn't seem to
* prevent it operating. Perhaps important for reliability (how requests
* are handled). */