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imx233/fuze+: allow dma info retrieval; wait for end of channel reset before returning; fix typo
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30795 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Amaury Pouly
parent
e428717d30
commit
b0a20dbc99
2 changed files with 115 additions and 5 deletions
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@ -24,6 +24,8 @@
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#include "config.h"
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#include "system.h"
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#include "dma-imx233.h"
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#include "lcd.h"
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#include "string.h"
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void imx233_dma_init(void)
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{
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@ -34,12 +36,22 @@ void imx233_dma_init(void)
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void imx233_dma_reset_channel(unsigned chan)
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{
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volatile uint32_t *ptr;
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uint32_t bm;
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if(APB_IS_APBX_CHANNEL(chan))
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__REG_SET(HW_APBX_CHANNEL_CTRL) =
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HW_APBX_CHANNEL_CTRL__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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{
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ptr = &HW_APBX_CHANNEL_CTRL;
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bm = HW_APBX_CHANNEL_CTRL__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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else
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__REG_SET(HW_APBH_CTRL0) =
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HW_APBH_CTRL0__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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{
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ptr = &HW_APBH_CTRL0;
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bm = HW_APBH_CTRL0__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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__REG_SET(*ptr) = bm;
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/* wait for end of reset */
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while(*ptr & bm)
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;
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}
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void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
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@ -54,6 +66,27 @@ void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
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HW_APBH_CTRL0__CLKGATE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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void imx233_dma_freeze_channel(unsigned chan, bool freeze)
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{
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volatile uint32_t *ptr;
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uint32_t bm;
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if(APB_IS_APBX_CHANNEL(chan))
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{
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ptr = &HW_APBX_CHANNEL_CTRL;
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bm = HW_APBX_CHANNEL_CTRL__FREEZE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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else
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{
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ptr = &HW_APBH_CTRL0;
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bm = HW_APBH_CTRL0__FREEZE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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if(freeze)
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__REG_SET(*ptr) = bm;
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else
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__REG_CLR(*ptr) = bm;
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}
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void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
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{
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volatile uint32_t *ptr;
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@ -65,7 +98,7 @@ void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
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}
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else
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{
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ptr = &HW_APBH_CTRL1;;
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ptr = &HW_APBH_CTRL1;
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bm = HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(APB_GET_DMA_CHANNEL(chan));
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}
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@ -186,3 +219,41 @@ void imx233_dma_wait_completion(unsigned chan)
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while(*sema & HW_APB_CHx_SEMA__PHORE_BM)
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yield();
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}
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struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags)
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{
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struct imx233_dma_info_t s;
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memset(&s, 0, sizeof(s));
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bool apbx = APB_IS_APBX_CHANNEL(chan);
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int dmac = APB_GET_DMA_CHANNEL(chan);
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if(flags & DMA_INFO_CURCMDADDR)
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s.cur_cmd_addr = apbx ? HW_APBX_CHx_CURCMDAR(dmac) : HW_APBH_CHx_CURCMDAR(dmac);
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if(flags & DMA_INFO_NXTCMDADDR)
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s.nxt_cmd_addr = apbx ? HW_APBX_CHx_NXTCMDAR(dmac) : HW_APBH_CHx_NXTCMDAR(dmac);
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if(flags & DMA_INFO_CMD)
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s.cmd = apbx ? HW_APBX_CHx_CMD(dmac) : HW_APBH_CHx_CMD(dmac);
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if(flags & DMA_INFO_BAR)
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s.bar = apbx ? HW_APBX_CHx_BAR(dmac) : HW_APBH_CHx_BAR(dmac);
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if(flags & DMA_INFO_AHB_BYTES)
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s.ahb_bytes = apbx ? __XTRACT_EX(HW_APBX_CHx_DEBUG2(dmac), HW_APBX_CHx_DEBUG2__AHB_BYTES) :
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__XTRACT_EX(HW_APBH_CHx_DEBUG2(dmac), HW_APBH_CHx_DEBUG2__AHB_BYTES);
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if(flags & DMA_INFO_APB_BYTES)
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s.apb_bytes = apbx ? __XTRACT_EX(HW_APBX_CHx_DEBUG2(dmac), HW_APBX_CHx_DEBUG2__APB_BYTES) :
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__XTRACT_EX(HW_APBH_CHx_DEBUG2(dmac), HW_APBH_CHx_DEBUG2__APB_BYTES);
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if(flags & DMA_INFO_FREEZED)
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s.freezed = apbx ? HW_APBX_CHANNEL_CTRL & HW_APBX_CHANNEL_CTRL__FREEZE_CHANNEL(dmac) :
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HW_APBH_CTRL0 & HW_APBH_CTRL0__FREEZE_CHANNEL(dmac);
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if(flags & DMA_INFO_GATED)
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s.gated = apbx ? false : HW_APBH_CTRL0 & HW_APBH_CTRL0__CLKGATE_CHANNEL(dmac);
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if(flags & DMA_INFO_INTERRUPT)
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{
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s.int_enabled = apbx ? HW_APBX_CTRL1 & HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ_EN(dmac) :
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HW_APBH_CTRL1 & HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(dmac);
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s.int_cmdcomplt = apbx ? HW_APBX_CTRL1 & HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ(dmac) :
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HW_APBH_CTRL1 & HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ(dmac);
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s.int_error = apbx ? HW_APBX_CTRL2 & HW_APBX_CTRL2__CHx_ERROR_IRQ(dmac) :
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HW_APBH_CTRL2 & HW_APBH_CTRL2__CHx_ERROR_IRQ(dmac);
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}
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return s;
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}
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@ -65,6 +65,10 @@
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#define HW_APBH_CHx_DEBUG1(i) (*(volatile uint32_t *)(HW_APBH_BASE + 0x90 + 0x70 * (i)))
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#define HW_APBH_CHx_DEBUG2(i) (*(volatile uint32_t *)(HW_APBH_BASE + 0xa0 + 0x70 * (i)))
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#define HW_APBH_CHx_DEBUG2__AHB_BYTES_BP 0
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#define HW_APBH_CHx_DEBUG2__AHB_BYTES_BM 0xffff
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#define HW_APBH_CHx_DEBUG2__APB_BYTES_BP 16
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#define HW_APBH_CHx_DEBUG2__APB_BYTES_BM 0xffff0000
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/********
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* APHX *
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@ -104,6 +108,10 @@
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#define HW_APBX_CHx_DEBUG1(i) (*(volatile uint32_t *)(HW_APBX_BASE + 0x150 + (i) * 0x70))
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#define HW_APBX_CHx_DEBUG2(i) (*(volatile uint32_t *)(HW_APBX_BASE + 0x160 + (i) * 0x70))
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#define HW_APBX_CHx_DEBUG2__AHB_BYTES_BP 0
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#define HW_APBX_CHx_DEBUG2__AHB_BYTES_BM 0xffff
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#define HW_APBX_CHx_DEBUG2__APB_BYTES_BP 16
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#define HW_APBX_CHx_DEBUG2__APB_BYTES_BM 0xffff0000
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/**********
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* COMMON *
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@ -117,6 +125,32 @@ struct apb_dma_command_t
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/* PIO words follow */
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};
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#define DMA_INFO_CURCMDADDR (1 << 0)
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#define DMA_INFO_NXTCMDADDR (1 << 1)
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#define DMA_INFO_CMD (1 << 2)
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#define DMA_INFO_BAR (1 << 3)
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#define DMA_INFO_APB_BYTES (1 << 4)
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#define DMA_INFO_AHB_BYTES (1 << 5)
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#define DMA_INFO_FREEZED (1 << 6)
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#define DMA_INFO_GATED (1 << 7)
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#define DMA_INFO_INTERRUPT (1 << 8)
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#define DMA_INFO_ALL 0x1ff
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struct imx233_dma_info_t
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{
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unsigned long cur_cmd_addr;
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unsigned long nxt_cmd_addr;
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unsigned long cmd;
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unsigned long bar;
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unsigned apb_bytes;
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unsigned ahb_bytes;
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bool freezed;
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bool gated;
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bool int_enabled;
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bool int_cmdcomplt;
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bool int_error;
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};
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#define APBH_DMA_CHANNEL(i) i
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#define APBX_DMA_CHANNEL(i) ((i) | 0x10)
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#define APB_IS_APBX_CHANNEL(x) ((x) & 0x10)
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@ -124,6 +158,7 @@ struct apb_dma_command_t
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#define APB_SSP(ssp) APBH_DMA_CHANNEL(HW_APBH_SSP(ssp))
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#define APB_AUDIO_ADC APBX_DMA_CHANNEL(HW_APBX_AUDIO_ADC)
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#define APB_AUDIO_DAC APBX_DMA_CHANNEL(HW_APBX_AUDIO_DAC)
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#define APB_I2C APBX_DMA_CHANNEL(HW_APBX_I2C)
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#define HW_APB_CHx_CMD__COMMAND_BM 0x3
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@ -160,6 +195,7 @@ void imx233_dma_reset_channel(unsigned chan);
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/* only apbh channel have clkgate control */
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void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock);
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void imx233_dma_freeze_channel(unsigned chan, bool freeze);
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void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable);
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/* clear both channel complete and error bits */
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void imx233_dma_clear_channel_interrupt(unsigned chan);
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@ -167,5 +203,8 @@ bool imx233_dma_is_channel_error_irq(unsigned chan);
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/* assume no command is in progress */
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void imx233_dma_start_command(unsigned chan, struct apb_dma_command_t *cmd);
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void imx233_dma_wait_completion(unsigned chan);
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/* get some info
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* WARNING: if channel is not freezed, data might not be coherent ! */
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struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags);
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#endif // __DMA_IMX233_H__
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