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rk27xx: overlap NAND write staging with the transfer

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Every sector of a write waited for the previous sector's transfer to
the chip before it was copied into a controller slot, so the copy and
the transfer never ran together. The slot the copy goes to is not the
one in transfer: copy first and wait only before the BCH engine and
the transfer restart.

On the Samsung YP-CP3, same test: 3.26 MB/s, every read verified, also
after a power cycle.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Change-Id: I41f43658916891a2ded74bbe21b6970f7cc78068
This commit is contained in:
Marcin Bukat 2026-10-01 21:36:03 +02:00
parent cc7d8d07b2
commit ae6c5eb8a8
1 changed files with 6 additions and 6 deletions
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12
firmware/target/arm/rk27xx/flash-rk27xx.c
View file

@ -461,17 +461,17 @@ static void load_run(uint8_t cmd, const struct prog_run *r)
spare[META_PROGRAMMED] = 0x00;
}
/* a slot is reused every four sectors: its last transfer must be
* done */
while (!(FLCTL & FL_RDY))
{
}
/* stage this sector while the previous one, in another slot,
* transfers; the BCH engine restarts only once that is done */
put_words((uintptr_t)&PAGE_BUF + (buf << 9),
r->data ? r->data + (size_t)i * FLASH_SECTOR_SIZE : NULL,
FLASH_SECTOR_SIZE);
put_words((uintptr_t)&SPARE_BUF + (buf << 4), spare, SPARE_SIZE);
while (!(FLCTL & FL_RDY))
{
}
BCHCTL = BCH_WR | BCH_RST;
FLCTL = FL_KICK_WRITE | (buf << 3);
}