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stm32h7: support clock enable/disable in SPI driver

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Change-Id: Id4baa340e1b67fb265628add9191acb08e3a0615
This commit is contained in:
Aidan MacDonald 2025-12-26 21:46:32 +00:00 • committed by Solomon Peachy
parent ddb3bb354c
commit a9b75fc4c4
4 changed files with 35 additions and 4 deletions
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21
firmware/target/arm/stm32/echoplayer/clock-echoplayer.c
View file

@ -133,6 +133,11 @@ static void init_lse(void)
reg_writef(PWR_CR1, DBP(0));
}
static void init_periph_clock(void)
{
reg_writef(RCC_D2CCIP1R, SPI45SEL_V(HSE));
}
void stm_target_clock_init(void)
{
init_hse();
@ -140,4 +145,20 @@ void stm_target_clock_init(void)
init_vos();
init_system_clock();
init_lse();
init_periph_clock();
}
void stm_target_clock_enable(enum stm_clock clock, bool enable)
{
switch (clock)
{
case STM_CLOCK_SPI5_KER:
reg_writef(RCC_APB2ENR, SPI5EN(enable));
reg_writef(RCC_APB2LPENR, SPI5EN(enable));
break;
default:
panicf("%s: unsupported clock %d", __func__, (int)clock);
break;
}
}

6
firmware/target/arm/stm32/echoplayer/lcd-echoplayer.c
View file

@ -24,11 +24,13 @@
#include "nvic-arm.h"
#include "spi-stm32h7.h"
#include "gpio-stm32h7.h"
#include "clock-stm32h7.h"
#include "regs/stm32h743/rcc.h"
#include "regs/stm32h743/spi.h"
struct stm_spi_config spi_cfg = {
.instance = ITA_SPI5,
.clock = STM_CLOCK_SPI5_KER,
.mode = STM_SPIMODE_HALF_DUPLEX,
.proto = STM_SPIPROTO_MOTOROLA,
.frame_bits = 9,
@ -53,10 +55,6 @@ static void set_row_column_address(int x, int y, int w, int h)
void lcd_init_device(void)
{
/* Clock configuration -- should be 12 MHz (SPI clock is 1/2 of HSE) */
reg_writef(RCC_D2CCIP1R, SPI45SEL_V(HSE));
reg_writef(RCC_APB2ENR, SPI5EN(1));
/* Configure SPI bus */
stm_spi_init(&spi, &spi_cfg);
nvic_enable_irq(NVIC_IRQN_SPI5);

9
firmware/target/arm/stm32/spi-stm32h7.c
View file

@ -37,6 +37,8 @@ static void stm_spi_enable(struct stm_spi *spi, bool hd_tx, size_t size)
if (tsize > TSIZE_MAX)
panicf("%s: tsize > TSIZE_MAX", __func__);
stm_clock_enable(spi->clock);
if (spi->set_cs)
spi->set_cs(spi, true);
@ -56,6 +58,8 @@ static void stm_spi_disable(struct stm_spi *spi)
if (spi->set_cs)
spi->set_cs(spi, false);
stm_clock_disable(spi->clock);
}
static uint32_t stm_spi_pack(const void **bufp, size_t *sizep)
@ -110,6 +114,7 @@ void stm_spi_init(struct stm_spi *spi,
uint32_t ftlevel;
spi->regs = config->instance;
spi->clock = config->clock;
spi->mode = config->mode;
spi->set_cs = config->set_cs;
@ -144,6 +149,8 @@ void stm_spi_init(struct stm_spi *spi,
ftlevel *= 2;
}
stm_clock_enable(spi->clock);
/* TODO: allow setting MBR here */
reg_writelf(spi->regs, SPI_CFG1,
MBR(0),
@ -170,6 +177,8 @@ void stm_spi_init(struct stm_spi *spi,
IOSWP(config->swap_mosi_miso),
MIDI(0),
MSSI(0));
stm_clock_disable(spi->clock);
}
int stm_spi_xfer(struct stm_spi *spi, size_t size,

3
firmware/target/arm/stm32/spi-stm32h7.h
View file

@ -23,6 +23,7 @@
#include "system.h"
#include "semaphore.h"
#include "clock-stm32h7.h"
#include <stddef.h>
struct stm_spi;
@ -49,6 +50,7 @@ struct stm_spi_config
{
/* Peripheral instance base address; one of ITA_SPIx */
uint32_t instance;
enum stm_clock clock;
enum stm_spi_mode mode;
enum stm_spi_protocol proto;
stm_spi_set_cs_t set_cs;
@ -65,6 +67,7 @@ struct stm_spi_config
struct stm_spi
{
uint32_t regs;
enum stm_clock clock;
enum stm_spi_mode mode;
stm_spi_set_cs_t set_cs;
uint32_t frame_size;